SLOS423K september   2003  – april 2023 THS3091 , THS3095

PRODUCTION DATA  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Device Comparison Table
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics: VS = ±15 V
    6. 7.6 Electrical Characteristics: VS = ±5 V
    7. 7.7 Typical Characteristics: ±15 V
    8. 7.8 Typical Characteristics: ±5 V
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Power-Down and Reference Pins Functionality
    4. 8.4 Device Functional Modes
      1. 8.4.1 Wideband, Noninverting Operation
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
        1. 9.4.1.1 PowerPAD Design Considerations
          1. 9.4.1.1.1 PowerPAD Layout Considerations
        2. 9.4.1.2 Power Dissipation and Thermal Considerations
      2. 9.4.2 Layout Example
  10. 10Device and Documentation Support
    1. 10.1 Device Support
      1. 10.1.1 Development Support
    2. 10.2 Documentation Support
      1. 10.2.1 Related Documentation
    3. 10.3 Receiving Notification of Documentation Updates
    4. 10.4 Support Resources
    5. 10.5 Trademarks
    6. 10.6 Electrostatic Discharge Caution
    7. 10.7 Glossary
  11. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information
PowerPAD Layout Considerations
  1. Figure 9-7 shows a PCB with a top-side etch pattern. Place an etch for the leads as well as etch for the thermal pad.
  2. Place 13 holes in the area of the thermal pad. The recommended holes size is 0.01 inch (0.254 mm) in diameter. Keep the holes small so that solder wicking through the holes is not a problem during reflow.
  3. Additional vias can be placed anywhere along the thermal plane outside of the thermal pad area. These additional vias help dissipate the heat generated by the THS309x device. The additional vias can be larger than the 0.01-inch (0.254 mm) diameter vias directly under the thermal pad. The additional vias can be larger because these vias are not in the thermal pad area to be soldered so that wicking is not a problem.
  4. Connect all holes to the internal ground plane. The PowerPAD is electrically isolated from the silicon and all leads. Therefore, connecting the PowerPAD to any potential voltage, such as VS–, is acceptable because there is no electrical connection to the silicon.
  5. When connecting these holes to the ground plane, do not use the typical web or spoke via connection methodology. Web connections have a high thermal resistance that is useful for slowing the heat transfer during soldering operations. This high thermal resistance makes the soldering of vias that have plane connections easier. In this application, however, low thermal resistance is desired for the most efficient heat transfer. Therefore, connect the holes under the THS309x PowerPAD package connection to the internal ground plane with a complete connection around the entire circumference of the plated-through hole.
  6. On the top-side solder mask, leave the terminals of the package and the thermal pad area with the 13 holes exposed. On the bottom-side solder mask, cover the 13 holes of the thermal pad area. This guideline prevents solder from being pulled away from the thermal pad area during the reflow process.
  7. Apply solder paste to the exposed thermal pad area and all of the device pins.
  8. With these preparatory steps in place, the device is simply placed in position and run through the solder reflow operation as with any standard surface-mount component. This process results in a device that is properly installed.
GUID-F150A1CB-7B02-48E4-9AFF-D19124004AE8-low.gif Figure 9-7 DDA PowerPAD PCB Etch and Via Pattern