at +VCC = 6 V, –VCC = –6 V, 25-Ω D2S source impedance , VIC = 0.25 V, internal path selected (PATHSEL = GND), VREF = GND, D2S RLOAD = 200 Ω at pin 6, RF = 249 Ω, RG = 162 Ω, OPS AV = 2.5 V/V, OPS On (DISABLE = GND), OPS RLOAD = 100 Ω at pin 11, and TJ ≈ 25°C (unless otherwise noted)
Figure 6-1 Frequency Response vs Output Voltage Figure 6-3 HD2 vs Frequency Figure 6-5 Gain vs Temperature Figure 6-7 Small-Signal Frequency Response vs Gain Figure 6-9 HD2 vs Gain Figure 6-11 HD2 vs Supply Voltage Figure 6-2 Small- and Large-Signal Step Response Figure 6-4 HD3 vs Frequency 25-Ω source impedance on each D2S input |
Figure 6-6 Input-Referred Differential NoiseFigure 6-8 Large-Signal Frequency Response vs Gain Figure 6-10 HD3 vs Gain Figure 6-12 HD3 vs Supply Voltage