SBOS875C August   2017  – February 2023 THS3491

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Bare Die Information
  8. 8 Specifications
    1. 8.1 Absolute Maximum Ratings
    2. 8.2 ESD Ratings
    3. 8.3 Recommended Operating Conditions
    4. 8.4 Thermal Information
    5. 8.5 Electrical Characteristics: VS = ±15 V
    6. 8.6 Electrical Characteristics: VS = ±7.5 V
    7. 8.7 Typical Characteristics: ±15 V
    8. 8.8 Typical Characteristics: ±7.5 V
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Power-Down (PD) Pin
      2. 9.3.2 Power-Down Reference (REF) Pin
      3. 9.3.3 Internal Junction Temperature Sense (TJ_SENSE) Pin
    4. 9.4 Device Functional Modes
      1. 9.4.1 Wideband Noninverting Operation
      2. 9.4.2 Wideband, Inverting Operation
      3. 9.4.3 Single-Supply Operation
      4. 9.4.4 Maximum Recommended Output Voltage
  10. 10Application and Implementation
    1. 10.1 Application Information
      1. 10.1.1 Driving Capacitive Loads
      2. 10.1.2 Video Distribution
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
      3. 10.2.3 Application Curves
    3. 10.3 Power Supply Recommendations
    4. 10.4 Layout
      1. 10.4.1 Layout Guidelines
        1. 10.4.1.1 PowerPAD™ Integrated Circuit Package Design Considerations (DDA Package Only)
          1. 10.4.1.1.1 PowerPAD™ Integrated Circuit Package Layout Considerations
          2. 10.4.1.1.2 Power Dissipation and Thermal Considerations
      2. 10.4.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Support Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7 Bare Die Information

DIE THICKNESS BACKSIDE FINISH BACKSIDE POTENTIAL BOND PAD METALLIZATION BOND PAD DIMENSIONS
15 mils (381 μm) Silicon with backgrind Wafer backside is electrically connected to -VS Al 76.0 µm × 76.0 µm
Bond Pad Coordinates in Microns
NAME PAD NUMBER X MIN Y MIN X MAX Y MAX
FB 1 26.9 887 103 963
VIN- 2 26.9 549 103 625
VIN+ 3 26.9 211 103 287
REF 4 180 23.7 256 99.7
DNC 5 431 23.7 507 99.7
TJ_SENSE 6 601 23.7 677 99.7
-VS 7 760 23.7 836 99.7
-VS 8 862 23.7 938 99.7
-VS 9 993 23.7 1069 99.7
-VS 10 1222 292 1298 368
VOUT 11 1222 459 1298 535
VOUT 12 1222 639 1298 715
+VS 13 1222 806 1298 882
+VS 14 993 1074 1069 1150
+VS 15 862 1074 938 1150
+VS 16 760 1074 836 1150
DNC 17 601 1074 677 1150
PD 18 431 1074 507 1150
REF 19 180 1074 256 1150