SBOS458H December   2008  – June 2015 THS4521 , THS4522 , THS4524

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics: VS+ - VS- = 3.3 V
    6. 7.6 Electrical Characteristics: VS+ - VS- = 5 V
    7. 7.7 Typical Characteristics
    8. 7.8 Typical Characteristics: VS+ - VS- = 3.3 V
    9. 7.9 Typical Characteristics: 5 V
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Frequency Response
      2. 8.3.2  Distortion
      3. 8.3.3  Slew Rate, Transient Response, Settling Time, Output Impedance, Overdrive, Output Voltage, and Turn-On/Turn-Off Time
      4. 8.3.4  Common-Mode and Power-Supply Rejection
      5. 8.3.5  VOCM Input
      6. 8.3.6  Typical Performance Variation With Supply VoltageTypical Performance Variation with Supply Voltage section
      7. 8.3.7  title of Single-Supply Operation sectionSingle-Supply Operation
      8. 8.3.8  Low-Power Applications and the Effects of Resistor Values on Bandwidth
      9. 8.3.9  Frequency Response Variation due to Package Options
      10. 8.3.10 Driving Capacitive Loads
      11. 8.3.11 Audio Performance
      12. 8.3.12 Audio On/Off Pop Performance
    4. 8.4 Device Functional Modes
      1. 8.4.1 Operation from Single-Ended Sources to Differential Outputs
        1. 8.4.1.1 AC-Coupled Signal Path Considerations for Single-Ended Input to Differential Output Conversion
        2. 8.4.1.2 DC-Coupled Input Signal Path Considerations for Single-Ended to Differential Conversion
        3. 8.4.1.3 Resistor Design Equations for the Single-Ended to Differential Configuration of the FDA
        4. 8.4.1.4 Input Impedance for the Single-Ended to Differential FDA Configuration
      2. 8.4.2 Differential-Input to Differential-Output Operation
        1. 8.4.2.1 AC-Coupled, Differential-Input to Differential-Output Design Issues
    5. 8.5 Programming
      1. 8.5.1 Input Common-Mode Voltage Range
        1. 8.5.1.1 Setting the Output Common-Mode Voltage
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1 Audio ADC Driver Performance: THS4521 and PCM4204 Combined Performance
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
          1. 9.2.1.2.1 Audio ADC Driver Performance: THS4521 and PCM3168 Combined Performance
        3. 9.2.1.3 Application Curves
      2. 9.2.2 ADC Driver Performance: THS4521 and ADS1278 Combined Performance
        1. 9.2.2.1 Design Requirements
        2. 9.2.2.2 Detailed Design Procedure
          1. 9.2.2.2.1 ADC Driver Performance: THS4521 and ADS8321 Combined Performance
        3. 9.2.2.3 Application Curves
      3. 9.2.3 Differential Input to Differential Output Amplifier
      4. 9.2.4 Single-Ended Input to Differential Output Amplifier
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Third-Party Products Disclaimer
    2. 12.2 Related Links
    3. 12.3 Community Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6 Pin Configuration and Functions

THS4521 D and DGK Package
8-Pin SOIC and VSSOP
Top View
THS4521 THS4522 THS4524 po_ths4521_bos458.gif
THS4522 PW Package
16-Pin TSSOP
Top View
THS4521 THS4522 THS4524 po_ths4522_bos458.gif
THS4524 DBT Package
38-Pin TSSOP
Top View
THS4521 THS4522 THS4524 po_ths4524_bos458.gif

Pin Functions: THS4521

PIN DESCRIPTION
NAME NO.
VIN– 1 Inverting amplifier input
VOCM 2 Common-mode voltage input
VS+ 3 Amplifier positive power-supply input
VOUT+ 4 Noninverting amplifier output
VOUT– 5 Inverting amplifier output
VS– 6 Amplifier negative power-supply input. Note that VS– is tied together on multi-channel devices.
PD 7 Power down. PD = logic low puts device into low-power mode. PD = logic high or open for normal operation.
VIN+ 8 Noninverting amplifier input

Pin Functions: THS4522

PIN DESCRIPTION
NAME NO.
PD1 1 Power down 1. PD = logic low puts device into low-power mode. PD = logic high or open for normal operation.
VIN1+ 2 Noninverting amplifier 1 input
VIN1– 3 Inverting amplifier 1 input
VOCM1 4 Common-mode voltage input 1
PD2 5 Power down 2. PD = logic low puts device into low-power mode. PD = logic high or open for normal operation.
VIN2+ 6 Noninverting amplifier 2 input
VIN2– 7 Inverting amplifier 2 input
VOCM2 8 Common-mode voltage input 2
VS+2 9 Amplifier 2 positive power-supply input
VOUT2+ 10 Noninverting amplifier 2 output
VOUT2– 11 Inverting amplifier 2 output
VS– 12 Negative power-supply input. Note that VS– is tied together on multi-channel devices.
VS+1 13 Amplifier 1 positive power-supply input
VOUT1+ 14 Noninverting amplifier 1 output
VOUT1– 15 Inverting amplifier 1 output
VS– 16 Negative power-supply input. Note that VS– is tied together on multi-channel devices.

Pin Functions: THS4524

PIN DESCRIPTION
NAME NO.
PD1 1 Power down 1. PD = logic low puts channel into low-power mode. PD = logic high or open for normal operation.
VIN1+ 2 Noninverting amplifier 1 input
VIN1– 3 Inverting amplifier 1 input
VOCM1 4 Common-mode voltage input 1
VS– 5 Negative power-supply input. Note that VS– is tied together on multi-channel devices.
PD2 6 Power down 2. PD = logic low puts channel into low-power mode. PD = logic high or open for normal operation.
VIN2+ 7 Noninverting amplifier 2 input
VIN2– 8 Inverting amplifier 2 input
VOCM2 9 Common-mode voltage input 2
VS– 10 Negative power-supply input. Note that VS– is tied together on multi-channel devices.
PD3 11 Power down 3. PD = logic low puts channel into low-power mode. PD = logic high or open for normal operation.
VIN3+ 12 Noninverting amplifier 3 input
VIN3– 13 Inverting amplifier 3 input
VOCM3 14 Common-mode voltage input 3
VS– 15 Negative power-supply input. Note that VS– is tied together on multi-channel devices.
PD4 16 Power down 4. PD = logic low puts channel into low-power mode. PD = logic high or open for normal operation.
VIN4+ 17 Noninverting amplifier 4 input
VIN4– 18 Inverting amplifier 4 input
VOCM4 19 Common-mode voltage input 4
VS4+ 20 Amplifier 4 positive power-supply input
VOUT4+ 21 Noninverting amplifier 4 output
VOUT4– 22 Inverting amplifier 4 output
VS– 23 Negative power-supply input. Note that VS– is tied together on multi-channel devices.
VS– 24 Negative power-supply input. Note that VS– is tied together on multi-channel devices.
VS3+ 25 Amplifier 3 positive power-supply input
VOUT3+ 26 Noninverting amplifier3 output
VOUT3– 27 Inverting amplifier3 output
VS– 28 Negative power-supply input. Note that VS– is tied together on multi-channel devices.
VS– 29 Negative power-supply input. Note that VS– is tied together on multi-channel devices.
VS2+ 30 Amplifier 2 positive power-supply input
VOUT2+ 31 Noninverting amplifier 2 output
VOUT2– 32 Inverting amplifier 2 output
VS– 33 Negative power-supply input. Note that VS– is tied together on multi-channel devices.
VS– 34 Negative power-supply input. Note that VS– is tied together on multi-channel devices.
VS1+ 35 Amplifier 1 positive power-supply input
VOUT1+ 36 Noninverting amplifier 1 output
VOUT1– 37 Inverting amplifier 1 output
VS– 38 Negative power-supply input. Note that VS– is tied together on multi-channel devices.