SLOS823D December   2012  – March 2020 THS4531A

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     1-kHz FFT Plot on Audio Analyzer
  4. 4 Revision History
  5. 5 Related Products
  6. 6 Pin Configuration and Functions
    1.     Pin Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics: VS = 2.7 V
    6. 7.6 Electrical Characteristics: VS = 5 V
    7. 7.7 Typical Characteristics
      1. 7.7.1 Typical Characteristics: VS = 2.7 V
      2. 7.7.2 Typical Characteristics: VS = 5 V
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Input Common-Mode Voltage Range
        1. 8.3.1.1 Setting the Output Common-Mode Voltage
      2. 8.3.2 Power Down
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1  Frequency Response, and Output Impedance
      2. 9.1.2  Distortion
      3. 9.1.3  Slew Rate, Transient Response, Settling Time, Overdrive, Output Voltage, and Turnon and Turnoff Time
      4. 9.1.4  Common-Mode and Power Supply Rejection
      5. 9.1.5  VOCM Input
      6. 9.1.6  Balance Error
      7. 9.1.7  Single-Supply Operation
      8. 9.1.8  Low-Power Applications and the Effects of Resistor Values on Bandwidth
      9. 9.1.9  Driving Capacitive Loads
      10. 9.1.10 Audio Performance
      11. 9.1.11 Audio On and Off Pop Performance
    2. 9.2 Typical Applications
      1. 9.2.1 SAR ADC Performance: THS4531A and ADS8321 Combined Performance
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
        3. 9.2.1.3 Application Curve
      2. 9.2.2 Audio ADC Driver Performance: THS4531A and PCM4204 Combined Performance
        1. 9.2.2.1 Detailed Design Procedure
        2. 9.2.2.2 Application Curves
      3. 9.2.3 SAR ADC Performance: THS4531A and ADS7945 Combined Performance
        1. 9.2.3.1 Design Requirements
        2. 9.2.3.2 Detailed Design Procedure
        3. 9.2.3.3 Application Curve
      4. 9.2.4 Differential-Input to Differential-Output Amplifier
        1. 9.2.4.1 AC-Coupled, Differential-Input to Differential-Output Design Issues
      5. 9.2.5 Single-Ended to Differential FDA Configuration
        1. 9.2.5.1 Input Impedance
      6. 9.2.6 Single-Ended Input to Differential Output Amplifier
        1. 9.2.6.1 AC-Coupled Signal Path Considerations for Single-Ended Input to Differential Output Conversion
        2. 9.2.6.2 DC-Coupled Input Signal Path Considerations for Single-Ended to Differential Conversion
        3. 9.2.6.3 Resistor Design Equations for the Single-Ended to Differential Configuration of the FDA
      7. 9.2.7 Differential Input to Single-Ended Output Amplifier
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Third-Party Products Disclaimer
    2. 12.2 Documentation Support
    3. 12.3 Community Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

9.2.6.2 DC-Coupled Input Signal Path Considerations for Single-Ended to Differential Conversion

The output considerations remain the same as for the AC-coupled design. Again, the input can be DC-coupled while the output is AC-coupled. A DC-coupled input with an AC-coupled output might have some advantages to move the input VICM down if the source is ground referenced. When the source is DC-coupled into the THS4531A family (see Figure 97), both sides of the input circuit must be DC-coupled to retain differential balance. Normally, the nonsignal input side has an RG element biased to whatever the source midrange is expected to be. Providing this midscale reference gives a balanced differential swing around VOCM at the outputs.

Often, RG2 is simply grounded for DC-coupled, bipolar-input applications. This configuration gives a balanced differential output if the source is swinging around ground. If the source swings from ground to some positive voltage, grounding RG2 gives a unipolar output differential swing from both outputs at VOCM (when the input is at ground) to one polarity of swing. Biasing RG2 to an expected midpoint for the input signal creates a differential output swing around VOCM.

One significant consideration for a DC-coupled input is that VOCM sets up a common-mode bias current from the output back through RF and RG to the source on both sides of the feedback. Without input balancing networks, the source must sink or source this DC current. After the input signal range and biasing on the other RG element is set, check that the voltage divider from VOCM to VIN through RF and RG (and possibly RS) establishes an input VICM at the device input pins that is in range.

If the average source is at ground, the negative rail input stage for the THS4531A family is in range for applications using a single positive supply and a positive output VOCM setting because this DC current lifts the average FDA input summing junctions up off of ground to a positive voltage (the average of the V+ and V– input pin voltages on the FDA).

THS4531A DC_Coupled_Single_Ended_to_Diff.gifFigure 97. DC-Coupled, Single-Ended-to-Differential, Set for a Gain of 5 V/V