SBOS778D April   2016  – April 2021 THS4551

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Companion Devices
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics: (VS+) – (VS–) = 5 V
    6. 7.6 Electrical Characteristics: (VS+) – (VS–) = 3 V
    7. 7.7 Typical Characteristics: (VS+) – (VS–) = 5 V
    8. 7.8 Typical Characteristics: (VS+) – (VS–) = 3 V
    9. 7.9 Typical Characteristics: 3-V to 5-V Supply Range
  8. 8 Parameter Measurement Information
    1. 8.1 Example Characterization Circuits
    2. 8.2 Output Interface Circuit for DC-Coupled Differential Testing
    3. 8.3 Output Common-Mode Measurements
    4. 8.4 Differential Amplifier Noise Measurements
    5. 8.5 Balanced Split-Supply Versus Single-Supply Characterization
    6. 8.6 Simulated Characterization Curves
    7. 8.7 Terminology and Application Assumptions
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Differential Open-Loop Gain and Output Impedance
      2. 9.3.2 Setting Resistor Values Versus Gain
      3. 9.3.3 I/O Headroom Considerations
      4. 9.3.4 Output DC Error and Drift Calculations and the Effect of Resistor Imbalances
    4. 9.4 Device Functional Modes
      1. 9.4.1 Operation from Single-Ended Sources to Differential Outputs
        1. 9.4.1.1 AC-Coupled Signal Path Considerations for Single-Ended Input to Differential Output Conversions
        2. 9.4.1.2 DC-Coupled Input Signal Path Considerations for Single-Ended to Differential Conversions
      2. 9.4.2 Operation from a Differential Input to a Differential Output
        1. 9.4.2.1 AC-Coupled, Differential-Input to Differential-Output Design Issues
        2. 9.4.2.2 DC-Coupled, Differential-Input to Differential-Output Design Issues
      3. 9.4.3 Input Overdrive Performance
  10. 10Application and Implementation
    1. 10.1 Application Information
      1. 10.1.1 Noise Analysis
      2. 10.1.2 Factors Influencing Harmonic Distortion
      3. 10.1.3 Driving Capacitive Loads
      4. 10.1.4 Interfacing to High-Performance Precision ADCs
      5. 10.1.5 Operating the Power Shutdown Feature
      6. 10.1.6 Designing Attenuators
      7. 10.1.7 The Effect of Adding a Feedback Capacitor
    2. 10.2 Typical Applications
      1. 10.2.1 An MFB Filter Driving an ADC Application
        1. 10.2.1.1 Design Requirements
        2. 10.2.1.2 Detailed Design Procedure
        3. 10.2.1.3 Application Curves
      2. 10.2.2 Differential Transimpedance Output to a High-Grade Audio PCM DAC Application
        1. 10.2.2.1 Design Requirements
        2. 10.2.2.2 Detailed Design Procedure
        3. 10.2.2.3 Application Curves
      3. 10.2.3 ADC3k Driver with a 2nd-Order RLC Interstage Filter Application
        1. 10.2.3.1 Design Requirements
        2. 10.2.3.2 Detailed Design Procedure
        3. 10.2.3.3 Application Curve
  11. 11Power Supply Recommendations
    1. 11.1 Thermal Analysis
  12. 12Layout
    1. 12.1 Layout Guidelines
      1. 12.1.1 Board Layout Recommendations
    2. 12.2 Layout Example
    3. 12.3 EVM Board
  13. 13Device and Documentation Support
    1. 13.1 Device Support
      1. 13.1.1 TINA-TI Simulation Model Features
    2. 13.2 Documentation Support
      1. 13.2.1 Related Documentation
    3. 13.3 Receiving Notification of Documentation Updates
    4. 13.4 Support Resources
    5. 13.5 Trademarks
    6. 13.6 Electrostatic Discharge Caution
    7. 13.7 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

9.4.1.1 AC-Coupled Signal Path Considerations for Single-Ended Input to Differential Output Conversions

When the signal path can be ac-coupled, the dc biasing for the THS4551 becomes a relatively simple task. In all designs, start by defining the output common-mode voltage. The ac-coupling issue can be separated for the input and output sides of an FDA design. The input can be ac-coupled and the output dc-coupled, or the output can be ac-coupled and the input dc-coupled, or both can be ac-coupled. One situation where the output can be dc-coupled (for an ac-coupled input), is when driving directly into an ADC where the VOCM control voltage uses the ADC common-mode reference to directly bias the FDA output common-mode voltage to the required ADC input common-mode voltage. In any case, the design starts by setting the desired VOCM. When an ac-coupled path follows the output pins, the best linearity is achieved by operating VOCM at midsupply, which can be easily delivered by floating the VOCM pin. The VOCM voltage must be within the linear range for the common-mode loop, as specified in the headroom specifications (approximately 0.7 V greater than the negative supply and 1.3 V less than the positive supply for the full –40°C to +125°C operation). If the output path is also ac-coupled, simply letting the VOCM control pin float is usually preferred in order to obtain a midsupply default VOCM bias with minimal elements. To limit noise, place a 0.1-µF decoupling capacitor on the VOCM control pin to ground.

After VOCM is defined, check the target output voltage swing to ensure that the VOCM plus the positive and negative output swing on each side does not clip into the supplies. If the desired output differential swing is defined as VOPP, divide by 4 to obtain the ±VP (peak voltage) swing around VOCM at each of the two output pins (each pin operates 180° out of phase with the other). Check that VOCM ±VP does not exceed the absolute supply rails for the rail-to-rail output (RRO) device. Common-mode current does not flow from the common-mode output voltage set by the VOCM pin towards the device input pins side, because both the source and balancing resistor on the non-signal input side are dc blocked (see Figure 9-5). The ac-coupled input path sets the input pin common-mode voltage equal to the output common-mode voltage.

The input pin positive headroom requirement (1.2 V) is less than the VOCM positive headroom (1.3 V). If the VOCM is in range, the input pins are also in range for the ac-coupled input configuration. This headroom requirement functions similarly for when the output VOCM voltage approaches the negative supply. The approximate minimum headroom of 0.6 V to the negative supply on the VOCM voltage is greater than the input pin voltage headroom of approximately 0 V for the negative rail input design. The input common-mode voltage is also in range if the output common-mode voltage is in range and above 0.6 V from the negative supply because the input common-mode voltage follows the output VOCM setting for ac-coupled input designs.

The input pin voltages move in a common-mode manner with the input signal, as described in Section 9.3.3. Confirm that the VOCM voltage plus the input VPP common-mode swing also stays in range for the input pins.