SBOS831B December   2016  – June 2021 THS4552

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics: (VS+) – (VS–) = 5 V
    6. 6.6 Electrical Characteristics: (VS+) – (VS–) = 3 V
    7. 6.7 Typical Characteristics: (VS+) – (VS–) = 5 V
    8. 6.8 Typical Characteristics: (VS+) – (VS–) = 3 V
    9. 6.9 Typical Characteristics: 3 V to 5 V Supply Range
  7. 7 Parameter Measurement Information
    1. 7.1 Example Characterization Circuits
    2. 7.2 Output Interface Circuit for DC-Coupled Differential Testing
    3. 7.3 Output Common-Mode Measurements
    4. 7.4 Differential Amplifier Noise Measurements
    5. 7.5 Balanced Split-Supply Versus Single-Supply Characterization
    6. 7.6 Simulated Characterization Curves
    7. 7.7 Terminology and Application Assumptions
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Differential Open-Loop Gain and Output Impedance
      2. 8.3.2 Setting Resistor Values Versus Gain
      3. 8.3.3 I/O Headroom Considerations
      4. 8.3.4 Output DC Error and Drift Calculations and the Effect of Resistor Imbalances
    4. 8.4 Device Functional Modes
      1. 8.4.1 Operation from Single-Ended Sources to Differential Outputs
        1. 8.4.1.1 AC-Coupled Signal Path Considerations for Single-Ended Input to Differential Output Conversions
        2. 8.4.1.2 DC-Coupled Input Signal Path Considerations for Single-Ended to Differential Conversions
      2. 8.4.2 Operation from a Differential Input to a Differential Output
        1. 8.4.2.1 AC-Coupled, Differential-Input to Differential-Output Design Issues
        2. 8.4.2.2 DC-Coupled, Differential-Input to Differential-Output Design Issues
      3. 8.4.3 Input Overdrive Performance
  9. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Noise Analysis
      2. 9.1.2 Factors Influencing Harmonic Distortion
      3. 9.1.3 Driving Capacitive Loads
      4. 9.1.4 Interfacing to High-Performance Precision ADCs
      5. 9.1.5 Operating the Power Shutdown Feature
      6. 9.1.6 Channel-to-Channel Crosstalk
      7. 9.1.7 Channel-to-Channel Mismatch
      8. 9.1.8 Designing Attenuators
      9. 9.1.9 The Effect of Adding a Feedback Capacitor
    2. 9.2 Typical Applications
      1. 9.2.1 An MFB Filter Driving an ADC Application
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
        3. 9.2.1.3 Application Curves
      2. 9.2.2 Differential Transimpedance Output to a High-Grade Audio PCM DAC Application
        1. 9.2.2.1 Design Requirements
        2. 9.2.2.2 Detailed Design Procedure
        3. 9.2.2.3 Application Curves
      3. 9.2.3 ADC3k Driver with a 2nd-Order RLC Interstage Filter Application
        1. 9.2.3.1 Design Requirements
        2. 9.2.3.2 Detailed Design Procedure
        3. 9.2.3.3 Application Curve
  10. 10Power Supply Recommendations
    1. 10.1 Thermal Analysis
  11. 11Layout
    1. 11.1 Layout Guidelines
      1. 11.1.1 Board Layout Recommendations
    2. 11.2 Layout Example
    3. 11.3 EVM Board
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 TINA-TI Simulation Model Features
    2. 12.2 Documentation Support
      1. 12.2.1 Related Documentation
    3. 12.3 Receiving Notification of Documentation Updates
    4. 12.4 Support Resources
    5. 12.5 Trademarks
    6. 12.6 Electrostatic Discharge Caution
    7. 12.7 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

9.2.1 An MFB Filter Driving an ADC Application

One common application for the THS4552 is to take a single-ended, high VPP voltage swing (from a high-voltage precision amplifier such as the OPA192) and deliver that swing to precision SAR ADC as a single-ended to differential conversion with output common-mode control and implement an active 2nd-order multiple feedback (MFB) filter design. Designing for a 40 VPP maximum input down to an 8 VPP differential swing requires a gain of 0.2 V/V. Targeting a 100 kHz Butterworth response with the RC elements tilted towards low noise gives the example design of Figure 9-14. Note that the VCM control is set to half of a 4.096 V reference, which is typical for
5 V differential SAR applications.

GUID-B1F13704-62CD-4304-94B2-A10F4064B914-low.gifFigure 9-14 Example 100 kHz Butterworth Filter