SBOS974F August   2019  – December 2024 THS6222

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics VS = 12 V
    6. 5.6 Electrical Characteristics VS = 32 V
    7. 5.7 Timing Requirements
    8. 5.8 Typical Characteristics: VS = 12 V
    9. 5.9 Typical Characteristics: VS = 32 V
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Common-Mode Buffer
      2. 6.3.2 Thermal Protection and Package Power Dissipation
      3. 6.3.3 Output Voltage and Current Drive
      4. 6.3.4 Breakdown Supply Voltage
      5. 6.3.5 Surge Test Results
    4. 6.4 Device Functional Modes
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Applications
      1. 7.2.1 Broadband PLC Line Driving
        1. 7.2.1.1 Design Requirements
        2. 7.2.1.2 Detailed Design Procedure
        3. 7.2.1.3 Application Curve
    3. 7.3 Best Design Practices
      1. 7.3.1 Do
      2. 7.3.2 Do Not
    4. 7.4 Power Supply Recommendations
    5. 7.5 Layout
      1. 7.5.1 Layout Guidelines
        1. 7.5.1.1 Wafer and Die Information
      2. 7.5.2 Layout Examples
  9. 8 Device and Documentation Support
    1. 8.1 Development Support
    2. 8.2 Documentation Support
      1. 8.2.1 Related Documentation
    3. 8.3 Receiving Notification of Documentation Updates
    4. 8.4 Support Resources
    5. 8.5 Trademarks
    6. 8.6 Electrostatic Discharge Caution
    7. 8.7 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • RGT|16
  • YS|0
  • RHF|24
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.3.3 Output Voltage and Current Drive

The THS6222 provides output voltage and current capabilities that are unsurpassed in a low-cost, monolithic op amp. Under no load at room temperature, the output voltage typically swings closer than 1.1 V to either supply rail and typically swings to within 1.1 V of either supply with a 100‑Ω differential load. The THS6222 can deliver over 350 mA of current with a 25‑Ω load.

Good thermal design of the system is important (including use of heat sinks and active cooling methods) if the THS6222 is pushed to the limits of the output drive capabilities. Figure 6-3 and Figure 6-4 show the output drive of the THS6222 under two different sets of conditions where TA is approximately equal to TJ. In practical applications, TJ is often much higher than TA and highly depends on the device configuration, signal parameters, and PCB thermal design. To represent the full output-drive capability of the THS6222 in Figure 6-3 and Figure 6-4, TJ ≈ TA is achieved by pulsing or sweeping the output current for a duration of less than 100 ms.

THS6222 Slammed Single-Ended Output Voltage vs IO and Temperature
VS = 12 V, TJ ≈ TA
Figure 6-3 Slammed Single-Ended Output Voltage vs IO and Temperature
THS6222 Linear Single-Ended Output Voltage vs IO and Temperature
VS = 12 V, TJ ≈ TA ≈ 25°C
Figure 6-4 Linear Single-Ended Output Voltage vs IO and Temperature

In Figure 6-3, the output voltages are differentially slammed to the rail and the output current is single-endedly sourced or sunk using a source measure unit (SMU) for less than 100 ms. The single-ended output voltage of each output is then measured prior to removing the load current. After removing the load current, the outputs are brought back to mid-supply before repeating the measurement for different load currents. This entire process is repeated for each ambient temperature. Under the slammed output voltage condition of Figure 6-3, the output transistors are in saturation and the transistors start going into linear operation as the output swing is backed off for a given IO,

In Figure 6-4, the inputs are floated and the output voltages are allowed to settle to the mid-supply voltage. The load current is then single-endedly swept for sourcing (greater than 0 mA) and sinking (less than 0 mA) conditions and the single-ended output voltage is measured at each current-forcing condition. The current sweep is completed in a few seconds (approximately 3 s to 4 s) so as not to significantly raise the junction temperature (TJ) of the device from the ambient temperature (TA). The output is not swinging and the output transistors are in linear operation in Figure 6-4 until the current drawn exceeds the device capabilities, at which point the output voltage starts to deviate quickly from the no load output voltage.

To maintain maximum output stage linearity, output short-circuit protection is not provided. This absence of short-circuit protection is normally not a problem because most applications include a series-matching resistor at the output that limits the internal power dissipation if the output side of this resistor is shorted to ground. However, shorting the output pin directly to the adjacent positive power-supply pin, in most cases, permanently damages the amplifier.