SBOS974F August   2019  – December 2024 THS6222

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics VS = 12 V
    6. 5.6 Electrical Characteristics VS = 32 V
    7. 5.7 Timing Requirements
    8. 5.8 Typical Characteristics: VS = 12 V
    9. 5.9 Typical Characteristics: VS = 32 V
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Common-Mode Buffer
      2. 6.3.2 Thermal Protection and Package Power Dissipation
      3. 6.3.3 Output Voltage and Current Drive
      4. 6.3.4 Breakdown Supply Voltage
      5. 6.3.5 Surge Test Results
    4. 6.4 Device Functional Modes
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Applications
      1. 7.2.1 Broadband PLC Line Driving
        1. 7.2.1.1 Design Requirements
        2. 7.2.1.2 Detailed Design Procedure
        3. 7.2.1.3 Application Curve
    3. 7.3 Best Design Practices
      1. 7.3.1 Do
      2. 7.3.2 Do Not
    4. 7.4 Power Supply Recommendations
    5. 7.5 Layout
      1. 7.5.1 Layout Guidelines
        1. 7.5.1.1 Wafer and Die Information
      2. 7.5.2 Layout Examples
  9. 8 Device and Documentation Support
    1. 8.1 Development Support
    2. 8.2 Documentation Support
      1. 8.2.1 Related Documentation
    3. 8.3 Receiving Notification of Documentation Updates
    4. 8.4 Support Resources
    5. 8.5 Trademarks
    6. 8.6 Electrostatic Discharge Caution
    7. 8.7 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • RGT|16
  • YS|0
  • RHF|24
Thermal pad, mechanical data (Package|Pins)
Orderable Information

3 Description

The THS6222 is a differential line-driver amplifier with a current-feedback architecture manufactured using Texas Instruments' proprietary, high-speed, silicon-germanium (SiGe) process. The device is targeted for use in broadband, high-speed, power line communications (HPLC, IEEE 1901.1) line driver applications that require high linearity when driving heavy line loads. The THS6222 supports PLC standards including G3, PRIME, ISO 15118 (HPGP), G.hn and PRIME BPL. Common modulation schema: OOK, FSK, OFDM.

The unique architecture of the THS6222 uses minimal quiescent current while achieving very high linearity. The amplifier has an adjustable current pin (IADJ) that sets the nominal current consumption along with the multiple bias modes that allow for enhanced power savings where the full performance of the amplifier is not required. Shutdown bias mode provides further power savings during receive mode in time division multiplexed (TDM) systems while maintaining high output impedance. The integrated midsupply common-mode buffer eliminates external components, reducing system cost and board space.

The wide output swing of 57VPP (100Ω load) with 32V power supplies, coupled with over 650mA of current drive (25Ω load), allows for wide dynamic range that keeps distortion minimal.

The THS6222 is available in 16-pin and 24-pin VQFN packages with exposed thermal pad, and is specified for operation from –40°C to +85°C.

Package Information
PART NUMBER PACKAGE(1) PACKAGE SIZE(2)
THS6222 RGT (VQFN, 16) 3mm × 3mm
RHF (VQFN, 24) 5mm × 4mm
YS die
(wafer sale, 19)		 1261.00µm × 1641.00µm
(1) For more information, see Section 10.
(2) The package size (length × width) is a nominal value and includes pins, where applicable.
THS6222 Typical Line-Driver Circuit Using the THS6222 Typical Line-Driver Circuit Using the THS6222