SBOS974F August   2019  – December 2024 THS6222

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics VS = 12 V
    6. 5.6 Electrical Characteristics VS = 32 V
    7. 5.7 Timing Requirements
    8. 5.8 Typical Characteristics: VS = 12 V
    9. 5.9 Typical Characteristics: VS = 32 V
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Common-Mode Buffer
      2. 6.3.2 Thermal Protection and Package Power Dissipation
      3. 6.3.3 Output Voltage and Current Drive
      4. 6.3.4 Breakdown Supply Voltage
      5. 6.3.5 Surge Test Results
    4. 6.4 Device Functional Modes
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Applications
      1. 7.2.1 Broadband PLC Line Driving
        1. 7.2.1.1 Design Requirements
        2. 7.2.1.2 Detailed Design Procedure
        3. 7.2.1.3 Application Curve
    3. 7.3 Best Design Practices
      1. 7.3.1 Do
      2. 7.3.2 Do Not
    4. 7.4 Power Supply Recommendations
    5. 7.5 Layout
      1. 7.5.1 Layout Guidelines
        1. 7.5.1.1 Wafer and Die Information
      2. 7.5.2 Layout Examples
  9. 8 Device and Documentation Support
    1. 8.1 Development Support
    2. 8.2 Documentation Support
      1. 8.2.1 Related Documentation
    3. 8.3 Receiving Notification of Documentation Updates
    4. 8.4 Support Resources
    5. 8.5 Trademarks
    6. 8.6 Electrostatic Discharge Caution
    7. 8.7 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • RGT|16
  • YS|0
  • RHF|24
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.3.5 Surge Test Results

Line drivers such as the THS6222 often directly interface with power lines through a transformer and various protection components in high-speed power line communications (HPLC) smart-meters and digital subscriber line (DSL) applications. Surge testing is an important requirement for such applications. To validate the performance and surge survivability of the THS6222, the THS6222 circuit configuration shown in Figure 6-7 was subjected to a ±4‑kV common-mode surge and a ±2‑kV differential-mode surge. The common-mode and differential-mode surge voltages were applied at VCM and VDIFF, respectively, in Figure 6-7. The 1.2/50‑µs surge profile was used per the IEC 61000-4-5 test with REQ = 42 Ω, as explained in the TI's IEC 61000-4-x Tests and Procedures application report. Five devices were tested in full-bias and shutdown modes, and were subjected to the surge five times for each polarity. No device showed any discernible change in quiescent current after being subjected to the surge test, and the out-of-band suppression tests did not show any performance deterioration either; see Figure 6-8 through Figure 6-11 for the state grid corporation of China (SGCC) HPLC bands.

THS6222 Surge Test Configuration Figure 6-7 Surge Test Configuration
THS6222 China SGCC HPLC Band0 Pre-Surge and Post-Surge
Figure 6-8 China SGCC HPLC Band0 Pre-Surge and Post-Surge
THS6222 China SGCC HPLC Band2 Pre-Surge and Post-Surge
Figure 6-10 China SGCC HPLC Band2 Pre-Surge and Post-Surge
THS6222 China SGCC HPLC Band1 Pre-Surge and Post-Surge
Figure 6-9 China SGCC HPLC Band1 Pre-Surge and Post-Surge
THS6222 China SGCC HPLC Band3 Pre-Surge and Post-Surge
Figure 6-11 China SGCC HPLC Band3 Pre-Surge and Post-Surge