SBOS974F August   2019  – December 2024 THS6222

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics VS = 12 V
    6. 5.6 Electrical Characteristics VS = 32 V
    7. 5.7 Timing Requirements
    8. 5.8 Typical Characteristics: VS = 12 V
    9. 5.9 Typical Characteristics: VS = 32 V
  7. Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Common-Mode Buffer
      2. 6.3.2 Thermal Protection and Package Power Dissipation
      3. 6.3.3 Output Voltage and Current Drive
      4. 6.3.4 Breakdown Supply Voltage
      5. 6.3.5 Surge Test Results
    4. 6.4 Device Functional Modes
  8. Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Applications
      1. 7.2.1 Broadband PLC Line Driving
        1. 7.2.1.1 Design Requirements
        2. 7.2.1.2 Detailed Design Procedure
        3. 7.2.1.3 Application Curve
    3. 7.3 Best Design Practices
      1. 7.3.1 Do
      2. 7.3.2 Do Not
    4. 7.4 Power Supply Recommendations
    5. 7.5 Layout
      1. 7.5.1 Layout Guidelines
        1. 7.5.1.1 Wafer and Die Information
      2. 7.5.2 Layout Examples
  9. Device and Documentation Support
    1. 8.1 Development Support
    2. 8.2 Documentation Support
      1. 8.2.1 Related Documentation
    3. 8.3 Receiving Notification of Documentation Updates
    4. 8.4 Support Resources
    5. 8.5 Trademarks
    6. 8.6 Electrostatic Discharge Caution
    7. 8.7 Glossary
  10. Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • RGT|16
  • YS|0
  • RHF|24
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Device Functional Modes

The THS6222 has four different functional modes set by the BIAS-1 and BIAS-2 pins. Table 6-1 shows the truth table for the device mode pin configuration and the associated description of each mode.

Table 6-1 BIAS-1 and BIAS-2 Logic Table
BIAS-1BIAS-2FUNCTIONDESCRIPTION
00Full-bias mode (100%)Amplifiers on with lowest distortion possible
10Mid-bias mode (75%)Amplifiers on with power savings and a reduction in distortion performance
01Low-bias mode (50%)Amplifiers on with enhanced power savings and a reduction of overall performance
11Shutdown modeAmplifiers off and output is high impedance

If the PLC application requires switching the line driver between all four power modes and if the PLC application-specific integrated circuit (ASIC) has two control bits, then the two control bits can be connected to the bias pins BIAS-1 and BIAS-2 for switching between any of the four power modes. Most PLC applications, however, only require the line driver to switch between one of the three active power modes and the shutdown mode. This type of 1-bit power mode control is illustrated in Figure 7-1, where the line driver can be switched between the full-bias and shutdown modes using just one control bit from the PLC ASIC. If switching between the mid-bias or low-bias modes and the shutdown mode is required for the application, then either the BIAS-1 or BIAS-2 pin can be connected to ground and the control pin from the PLC ASIC can be connected to the non-grounded BIAS pin.