SLLSF87A May   2021  – November 2021 THVD1406 , THVD1426

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  ESD Ratings - IEC Specifications
    4. 6.4  Recommended Operating Conditions
    5. 6.5  Thermal Information
    6. 6.6  Power Dissipation Characteristics
    7. 6.7  Electrical Characteristics
    8. 6.8  Switching Characteristics (THVD1406)
    9. 6.9  Switching Characteristics (THVD1426)
    10. 6.10 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagrams
    3. 8.3 Feature Description
    4. 8.4 Device Functional Modes
  9. 9 Application Information Disclaimer
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
        1. 9.2.1.1 Data Rate and Bus Length
        2. 9.2.1.2 Stub Length
        3. 9.2.1.3 Bus Loading
        4. 9.2.1.4 Receiver Failsafe
        5. 9.2.1.5 Transient Protection
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Third-Party Products Disclaimer
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Support Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5 Pin Configuration and Functions

GUID-B412034B-95E3-40CE-BDC6-57A54E7BDD9F-low.gifFigure 5-1 D (8-Pin SOIC) , DRL (8-Pin SOT) Top View
Table 5-1 Pin Functions
PINI/ODESCRIPTION
NAMENO.
R1OReceiver data output
RE2IReceiver enable, active low (internal 2-MΩ pull-up)
SHDN3IShutdown enable, active low (internal 2-MΩ pull-up)
D4

I

Driver data input
GND5-Device ground
A6I/OBus I/O port, A (complementary to B)
B7I/OBus I/O port, B (complementary to A)
VCC8P3-V to 5.5-V supply

For the device.