SLLSF87A May   2021  – November 2021 THVD1406 , THVD1426

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  ESD Ratings - IEC Specifications
    4. 6.4  Recommended Operating Conditions
    5. 6.5  Thermal Information
    6. 6.6  Power Dissipation Characteristics
    7. 6.7  Electrical Characteristics
    8. 6.8  Switching Characteristics (THVD1406)
    9. 6.9  Switching Characteristics (THVD1426)
    10. 6.10 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagrams
    3. 8.3 Feature Description
    4. 8.4 Device Functional Modes
  9. 9 Application Information Disclaimer
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
        1. 9.2.1.1 Data Rate and Bus Length
        2. 9.2.1.2 Stub Length
        3. 9.2.1.3 Bus Loading
        4. 9.2.1.4 Receiver Failsafe
        5. 9.2.1.5 Transient Protection
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Third-Party Products Disclaimer
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Support Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.9 Switching Characteristics (THVD1426)

over operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Driver
tr, tf Driver differential output rise and fall times See Figure 7-3 
 		 8 25 ns
tPHL, tPLH Driver propagation delay
 		 17 35 ns
tSK(P) Driver pulse skew, |tPHL – tPLH|
 		 3.5 ns
tPHZ, tPLZ Driver disable time See Figure 7-4  and Figure 7-5 
 		 15 38 ns
tPZH, tPZL Driver enable time Receiver enabled
 		 15 70 ns
Receiver disabled
 		 5 10 µs
tdevice_auto-dir Driver active time in the auto-direction mode when SHDN is high and D turns from low to high Driver active time in the auto-direction mode when SHDN is high and D switches from low to high Figure 7-8 0.4 0.8 1.45 µs
Receiver
tr, tf Receiver output rise and fall times See Figure 7-6 
 		 4 16 ns
tPHL, tPLH Receiver propagation delay time
 		 40 75 ns
tSK(P) Receiver pulse skew, |tPHL – tPLH|
 
 		 5 ns
tPHZ, tPLZ Receiver disable time See Figure 7-7 
 		 15 25 ns
tPZL(1), tPZH(1)
 		 Receiver enable time Driver enabled See Figure 7-7 
 		 80 170 ns