SLLSFQ4A
September 2022 – March 2023
THVD1424
PRODUCTION DATA
1
Features
2
Applications
3
Description
4
Revision History
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
ESD Ratings [IEC]
6.4
Recommended Operating Conditions
6.5
Thermal Information
6.6
Power Dissipation
6.7
Electrical Characteristics
6.8
Switching Characteristics_500 kbps
6.9
Switching Characteristics_20 Mbps
6.10
Switching Characteristics_Termination resistor
6.11
Switching Characteristics_Duplex switching
6.12
Typical Characteristics
7
Parameter Measurement Information
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagrams
8.3
Feature Description
8.4
Device Functional Modes
8.4.1
On-Chip Switchable Termination
8.4.2
Operational Data rate
8.4.3
Protection Features
9
Application Information Disclaimer
9.1
Application Information
9.2
Typical Application
9.2.1
Design Requirements
9.2.1.1
Data Rate and Bus Length
9.2.1.2
Stub Length
9.2.1.3
Bus Loading
9.2.1.4
Receiver Failsafe
9.2.1.5
Transient Protection
9.2.2
Detailed Design Procedure
9.2.3
Application Curves
9.3
Power Supply Recommendations
9.4
Layout
9.4.1
Layout Guidelines
9.4.2
Layout Example
10
Device and Documentation Support
10.1
Device Support
10.1.1
Third-Party Products Disclaimer
10.2
Receiving Notification of Documentation Updates
10.3
Support Resources
10.4
Trademarks
10.5
Electrostatic Discharge Caution
10.6
Glossary
11
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
RGT|16
MPQF119H
Thermal pad, mechanical data (Package|Pins)
RGT|16
QFND098S
Orderable Information
sllsfq4a_oa
sllsfq4a_pm
9.2.3
Application Curves
Figure 9-8
THVD1424 Receiver Waveforms at 20 Mbps, with Common Mode Moving at 1 Mhz
Figure 9-10
THVD1424 Driver Waveforms at 500 kbps with Termination Enabled
Figure 9-9
THVD1424 Driver Waveforms at 20 Mbps with Termination Enabled