SLLSFQ4A September   2022  – March 2023 THVD1424

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  ESD Ratings [IEC]
    4. 6.4  Recommended Operating Conditions
    5. 6.5  Thermal Information
    6. 6.6  Power Dissipation
    7. 6.7  Electrical Characteristics
    8. 6.8  Switching Characteristics_500 kbps
    9. 6.9  Switching Characteristics_20 Mbps
    10. 6.10 Switching Characteristics_Termination resistor
    11. 6.11 Switching Characteristics_Duplex switching
    12. 6.12 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagrams
    3. 8.3 Feature Description
    4. 8.4 Device Functional Modes
      1. 8.4.1 On-Chip Switchable Termination
      2. 8.4.2 Operational Data rate
      3. 8.4.3 Protection Features
  9. 9 Application Information Disclaimer
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
        1. 9.2.1.1 Data Rate and Bus Length
        2. 9.2.1.2 Stub Length
        3. 9.2.1.3 Bus Loading
        4. 9.2.1.4 Receiver Failsafe
        5. 9.2.1.5 Transient Protection
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  10. 10Device and Documentation Support
    1. 10.1 Device Support
      1. 10.1.1 Third-Party Products Disclaimer
    2. 10.2 Receiving Notification of Documentation Updates
    3. 10.3 Support Resources
    4. 10.4 Trademarks
    5. 10.5 Electrostatic Discharge Caution
    6. 10.6 Glossary
  11. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

3 Description

The THVD1424 is a flexible RS-485 transceiver for industrial applications. The device has features such as on-chip 120-Ω termination resistor, slew rate control and interchangeability between half and full duplex mode. All the features are pin-controlled. This enables the device to be used at any node location (end nodes or middle nodes) in any network, two-wire (half duplex) or 4-wire (full duplex), slow or fast. End-equipment designers can now design a common printed circuit board (PCB) and configure it via software for various application needs. This can save considerable design and qualification time for the customers.

The bus pins are immune to high levels of IEC Contact Discharge ESD events, eliminating the need for additional system level protection components. The device operates from 3 to 5.5-V bus supply, while the logic supply voltage range is 1.65 V to 5.5 V. The wide common-mode voltage range and low input leakage on bus pins makes the devices suitable for multi-point applications over long cable runs.

The device is available in a space-saving, thermally efficient 16-pin VQFN package. The device is characterized for ambient temperatures from –40°C to 125°C.

Package Information
PART NUMBERPACKAGE(1)BODY SIZE (NOM)
THVD1424VQFN (16)3 mm x 3 mm
(1) For the complete part number, see the orderable addendum at the end of the data sheet.
GUID-20220729-SS0I-CFNF-K5TH-DCL1S8XVXWBK-low.svg Simplified Schematic