SLLSFQ4A September   2022  – March 2023 THVD1424

PRODUCTION DATA  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  ESD Ratings [IEC]
    4. 6.4  Recommended Operating Conditions
    5. 6.5  Thermal Information
    6. 6.6  Power Dissipation
    7. 6.7  Electrical Characteristics
    8. 6.8  Switching Characteristics_500 kbps
    9. 6.9  Switching Characteristics_20 Mbps
    10. 6.10 Switching Characteristics_Termination resistor
    11. 6.11 Switching Characteristics_Duplex switching
    12. 6.12 Typical Characteristics
  7. Parameter Measurement Information
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagrams
    3. 8.3 Feature Description
    4. 8.4 Device Functional Modes
      1. 8.4.1 On-Chip Switchable Termination
      2. 8.4.2 Operational Data rate
      3. 8.4.3 Protection Features
  9. Application Information Disclaimer
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
        1. 9.2.1.1 Data Rate and Bus Length
        2. 9.2.1.2 Stub Length
        3. 9.2.1.3 Bus Loading
        4. 9.2.1.4 Receiver Failsafe
        5. 9.2.1.5 Transient Protection
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  10. 10Device and Documentation Support
    1. 10.1 Device Support
      1. 10.1.1 Third-Party Products Disclaimer
    2. 10.2 Receiving Notification of Documentation Updates
    3. 10.3 Support Resources
    4. 10.4 Trademarks
    5. 10.5 Electrostatic Discharge Caution
    6. 10.6 Glossary
  11. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Detailed Design Procedure

To protect bus nodes against high-energy transients such as surge, the implementation of external transient protection devices is necessary. Figure 9-6 and Figure 9-7suggest a protection circuit against 1 kV surge (IEC 61000-4-5) transients. Table 9-1 shows the associated bill of materials.

GUID-20220729-SS0I-BCBL-FLZT-S2M4BS9R4150-low.svg Figure 9-6 Transient Protection Against Surge Transients for THVD1424
Configured in Half-Duplex Mode
GUID-20220729-SS0I-DJLB-NTDQ-NCJ2FCMRTVGG-low.svg Figure 9-7 Transient Protection Against Surge Transients for THVD1424
Configured in Full-Duplex Mode
Table 9-1 Bill of Materials
DEVICEFUNCTIONORDER NUMBERMANUFACTURER(1)
XCVRRS-485 transceiverTHVD1424TI
R110-Ω, pulse-proof thick-film resistorCRCW0603010RJNEAHPVishay
R2
TVSBidirectional 400-W transient suppressorCDSOT23-SM712Bourns