SLLSFQ4A September   2022  – March 2023 THVD1424

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  ESD Ratings [IEC]
    4. 6.4  Recommended Operating Conditions
    5. 6.5  Thermal Information
    6. 6.6  Power Dissipation
    7. 6.7  Electrical Characteristics
    8. 6.8  Switching Characteristics_500 kbps
    9. 6.9  Switching Characteristics_20 Mbps
    10. 6.10 Switching Characteristics_Termination resistor
    11. 6.11 Switching Characteristics_Duplex switching
    12. 6.12 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagrams
    3. 8.3 Feature Description
    4. 8.4 Device Functional Modes
      1. 8.4.1 On-Chip Switchable Termination
      2. 8.4.2 Operational Data rate
      3. 8.4.3 Protection Features
  9. 9 Application Information Disclaimer
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
        1. 9.2.1.1 Data Rate and Bus Length
        2. 9.2.1.2 Stub Length
        3. 9.2.1.3 Bus Loading
        4. 9.2.1.4 Receiver Failsafe
        5. 9.2.1.5 Transient Protection
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  10. 10Device and Documentation Support
    1. 10.1 Device Support
      1. 10.1.1 Third-Party Products Disclaimer
    2. 10.2 Receiving Notification of Documentation Updates
    3. 10.3 Support Resources
    4. 10.4 Trademarks
    5. 10.5 Electrostatic Discharge Caution
    6. 10.6 Glossary
  11. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.9 Switching Characteristics_20 Mbps

20-Mbps (SLR = GND) over recommended operating conditions. All typical values are at 25°C and supply voltage of VCC = 5 V, VIO = 3.3 V. (1) 
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Driver
tr, tf Differential output rise/fall time RL = 54 Ω, CL = 50 pF
See Figure 7-3
 VCC = 3 to 3.6 V, Typical at 3.3 V 5 9 15 ns
VCC = 4.5 to 5.5 V, Typical at 5 V 4.5 8 15 ns
tPHL, tPLH Propagation delay VIO = 1.65 V to 1.95V 14 25 50 ns
VIO = 3 V to 3.6 V 9 20 40 ns
tSK(P) Pulse skew, |tPHL – tPLH| VCC = 3 to 3.6 V, Typical at 3.3 V 1 3.5 ns
VCC = 4.5 to 5.5 V, Typical at 5 V 1 3.5 ns
tPHZ, tPLZ Disable time RE = X See Figure 7-4 and Figure 7-5   25 50 ns
tPZH, tPZL Enable time RE = 0 V See Figure 7-4 and Figure 7-5 30 70 ns
tPZH, tPZL Enable time RE = VIO , VIO = 1.65 V to 1.95 V See Figure 7-4 and Figure 7-5 6 11 μs
RE = VIO , VIO = 3 V to 3.6 V 6 11
Receiver
tr, tf Output rise/fall time CL = 15 pF See Figure 7-6 5 10 ns
tPHL, tPLH Propagation delay 30 55 ns
tSK(P) Pulse skew, |tPHL – tPLH| 4 ns
tPHZ, tPLZ Disable time DE = X See Figure 7-7 20 58 ns
tPZH(1),
tPZL(1)		 Enable time DE = VIO 80 155 ns
tPZH(2),
tPZL(2)		 Enable time VIO = 1.65 V to 1.95 V; DE = 0 V See Figure 7-8 6 11 μs
VIO = 3 V to 3.6 V; DE = 0 V 6 11 μs
(1) A, B are RX input, Y/Z are driver output terminals in Full duplex mode.