SLLSF87A May   2021  – November 2021 THVD1406 , THVD1426

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  ESD Ratings - IEC Specifications
    4. 6.4  Recommended Operating Conditions
    5. 6.5  Thermal Information
    6. 6.6  Power Dissipation Characteristics
    7. 6.7  Electrical Characteristics
    8. 6.8  Switching Characteristics (THVD1406)
    9. 6.9  Switching Characteristics (THVD1426)
    10. 6.10 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagrams
    3. 8.3 Feature Description
    4. 8.4 Device Functional Modes
  9. 9 Application Information Disclaimer
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
        1. 9.2.1.1 Data Rate and Bus Length
        2. 9.2.1.2 Stub Length
        3. 9.2.1.3 Bus Loading
        4. 9.2.1.4 Receiver Failsafe
        5. 9.2.1.5 Transient Protection
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Third-Party Products Disclaimer
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Support Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.4 Device Functional Modes

When the shutdown pin, SHDN, is logic high, the differential outputs A and B follow the logic states at data input D. When D is low, the output states reverse, B turns high, A becomes low, and VOD is negative. A logic high at D causes A to turn high and B to turn low for a duration. In this case, the differential output voltage defined as VOD = VA – VB is positive for tdevice-auto-dir. After this duration, the driver turns off and the receiver is enabled. The device can be used in auto-direction mode by tying SHDN and RE pins together to logic high and controlling the driver and receiver using the data input pin, D. This enables reducing the number of GPIO pins or the number of isolation channels required to operate the device. Please refer to Table 8-1 and Table 8-2 for further details.

When SHDN is low, both the driver and the receiver are turned off and the device is in shutdown mode. In this condition, the logic state at D is irrelevant. The SHDN pin has an internal pull-up resistor to VCC; thus, when left open, the driver is status is dependent on the status of the D pin. The D pin has an internal pull-up resistor to VCC, thus, when left open while the driver is enabled for tdevice-auto-dir, before bring disabled.

Table 8-1 Driver Function Table
INPUTENABLEOUTPUTSFUNCTION
DSHDNAB
HH/OPENHLActively drive bus high for tdevice-auto-dir and then bus is in high impedance
LH/OPENLHActively drive bus low
XLZZDriver disabled. Device in shutdown mode.
OPENH/OPENHLActively drive bus high for tdevice-auto-dir and then bus is in high impedance

When the receiver enable pin, RE, is logic low, the receiver is enabled. When the differential input voltage defined as VID = VA – VB is positive and higher than the positive input threshold, VIT+, the receiver output, R, turns high. When VID is negative and lower than the negative input threshold, VIT-, the receiver output, R, turns low. If VID is between VIT+ and VIT- the output is indeterminate.

When RE is logic high or left open and D input is logic low, the receiver output is high-impedance and the magnitude and polarity of VID are irrelevant. Internal biasing of the receiver inputs causes the output to go failsafe-high when the transceiver is disconnected from the bus (open-circuit), the bus lines are shorted (short-circuit), or the bus is not actively driven (idle bus).

When RE is logic high or left open and D input switches from logic low to logic high, the receiver output is high-impedance for the duration of tdevice-auto-dir. After the duration of tdevice-auto-dir, the receiver turns ON and outputs a logic high or low depending upon the differntial bus input voltage.

Table 8-2 Receiver Function Table
DIFFERENTIAL INPUT ENABLE

INPUT

 OUTPUT FUNCTION
VID = VA – VB RE

D

 R
VIT+ < VID L

X

 H Receive valid bus high
VIT- < VID < VIT+ L

X

 ? Indeterminate bus state
VID < VIT- L

X

 L Receive valid bus low
X H/OPEN

L

 Z Receiver disabled
X H/OPEN

H

Z for tdevice_autodir followed by L or H depending upon bus input voltage

 Receiver disabled by

for tdevice_autodir after D switches from L to H. Receiver output follows bus input voltage after tdevice_autodir
Open-circuit bus L

X

 H Fail-safe high output
Short-circuit bus L

X

 H Fail-safe high output
Idle (terminated) bus L

X

 H Fail-safe high output