SLLSEV1C September   2017  – December 2018 THVD1510 , THVD1512 , THVD1550 , THVD1551 , THVD1552

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      THVD1510 and THVD1550 Simplified Schematic
      2.      THVD1551 Simplified Schematic
      3.      THVD1512 and THVD1552 Simplified Schematic
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
    1.     Pin Functions
    2.     Pin Functions
    3.     Pin Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Power Dissipation
    6. 7.6 Electrical Characteristics
    7. 7.7 Switching Characteristics
    8. 7.8 Switching Characteristics
    9. 7.9 Typical Characteristics
  8. 8 Parameter Measurement Information
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagrams
    3. 9.3 Feature Description
    4. 9.4 Device Functional Modes
      1. 9.4.1 Device Functional Modes for THVD1510 and THVD1550
      2. 9.4.2 Device Functional Modes for THVD1551
      3. 9.4.3 Device Functional Modes for THVD1512 and THVD1552
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
        1. 10.2.1.1 Data Rate and Bus Length
        2. 10.2.1.2 Stub Length
        3. 10.2.1.3 Bus Loading
        4. 10.2.1.4 Receiver Failsafe
        5. 10.2.1.5 Transient Protection
      2. 10.2.2 Detailed Design Procedure
      3. 10.2.3 Application Curves
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Device Support
    2. 13.2 Third-Party Products Disclaimer
    3. 13.3 Related Links
    4. 13.4 Receiving Notification of Documentation Updates
    5. 13.5 Community Resources
    6. 13.6 Trademarks
    7. 13.7 Electrostatic Discharge Caution
    8. 13.8 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • D|14
  • DGS|10
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6 Pin Configuration and Functions

THVD1510, THVD1550 Devices
8-Pin D Package (SOIC)
Top View
THVD1510, THVD1550 Devices
8-Pin DGK Package (VSSOP)
Top View

Pin Functions

PIN I/O DESCRIPTION
NAME D DGK
A 6 6 Bus input/output Bus I/O port, A (complementary to B)
B 7 7 Bus input/output Bus I/O port, B (complementary to A)
D 4 4 Digital input Driver data input
DE 3 3 Digital input Driver enable, active high (2 MΩ internal pull-down)
GND 5 5 Ground Device ground
R 1 1 Digital output Receive data output
VCC 8 8 Power 5-V supply
RE 2 2 Digital input Receiver enable, active low (2 MΩ internal pull-up)
THVD1551 Device
8-Pin DGK Package (VSSOP)
Top View

Pin Functions

PIN I/O DESCRIPTION
NAME DGK
A 8 Bus input Bus input, A (complementary to B)
B 7 Bus input Bus input, B (complementary to A)
D 3 Digital input Driver data input
GND 4 Ground Device ground
R 2 Digital output Receive data output
VCC 1 Power 5-V supply
Y 5 Bus output Bus output, Y (complementary to Z)
Z 6 Bus output Bus output, Z (complementary to Y)
THVD1552 Device
14-Pin D Package (SOIC)
Top View
THVD1512, THVD1552 Devices
10-Pin DGS Package (VSSOP)
Top View

Pin Functions

PIN I/O DESCRIPTION
NAME D DGS
A 12 9 Bus input Bus input, A (complementary to B)
B 11 8 Bus input Bus input, B (complementary to A)
D 5 4 Digital input Driver data input
DE 4 3 Digital input Driver enable, active high (2 MΩ internal pull-down)
GND 6, 7(1) 5 Ground Device ground
NC 1, 8 — — Internally not connected
R 2 1 Digital output Receive data output
VCC — 10 Power 5-V supply.
13, 14 — Power 5-V supply. These pins are not connected together internally, so power must be applied to both.
Y 9 6 Bus output Bus output, Y (Complementary to Z)
Z 10 7 Bus output Bus output, Z (Complementary to Y)
RE 3 2 Digital input Receiver enable, active low (2 MΩ internal pull-up)
(1) These pins are internally connected