SLLSFP5A January   2024  – August 2024 THVD2419 , THVD2429

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  ESD Ratings - IEC Specifications
    4. 6.4  Recommended Operating Conditions
    5. 6.5  Thermal Information
    6. 6.6  Power Dissipation
    7. 6.7  Electrical Characteristics
    8. 6.8  Switching Characteristics 250kbps
    9. 6.9  Switching Characteristics 20Mbps
    10. 6.10 Typical Characteristics
  8. 7 Parameter Measurement Information
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagrams
    3. 8.3 Feature Description
      1. 8.3.1 Electrostatic Discharge (ESD) Protection
      2. 8.3.2 Electrical Fast Transient (EFT) Protection
      3. 8.3.3 Surge Protection
      4. 8.3.4 Enhanced Receiver Noise Immunity
      5. 8.3.5 Failsafe Receiver
    4. 8.4 Device Functional Modes
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
        1. 9.2.1.1 Data Rate and Bus Length
        2. 9.2.1.2 Stub Length
        3. 9.2.1.3 Bus Loading
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Device Support
    2. 10.2 Receiving Notification of Documentation Updates
    3. 10.3 Support Resources
    4. 10.4 Trademarks
    5. 10.5 Electrostatic Discharge Caution
    6. 10.6 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.4 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)
MIN NOM MAX UNIT
VCC Supply voltage 3 5.5 V
VIO I/O supply voltage (devices with VIO pin) 1.65 VCC V
VIH High-level input voltage (D, DE, RE)
devices with VIO pin

 0.7 1 VIO
VIL Low-level input voltage (D, DE, RE) 0 0.3 VIO
VIH High-level input voltage (D, DE, RE) devices without VIO pin 0.7 1 VCC
VIL Low-level input voltage (D, DE, RE) 0 0.3 VCC
VI Input voltage at any bus terminal (separately or common mode)(1) –25 25 V
VID Differential input voltage –25 25 V
IO Output current, driver –60 60 mA
IOR Output current, receiver VIO = 1.8V or 2.5V (devices with VIO pin) –4 4 mA
IOR Output current, receiver VIO = 3.3V or 5V (devices with VIO pin) or VCC = 3.3V or 5V (devices without VIO pin) –8 8 mA
RL Differential load resistance 54 60 Ω
1/tUI Signaling rate THVD2419  250 kbps
THVD2429 20 Mbps
TA Operating ambient temperature -40 125 °C
TJ Junction temperature  -40 150 °C
(1) The algebraic convention, in which the least positive (most negative) limit is designated as minimum is used in this data sheet.