SLLSFQ9B
May 2024 – October 2024
THVD2410V-EP
,
THVD2450V-EP
,
THVD2452V-EP
PRODUCTION DATA
1
1
Features
2
Applications
3
Description
4
Pin Configuration and Functions
5
Specifications
5.1
Absolute Maximum Ratings
5.2
ESD Ratings
5.3
ESD Ratings [IEC]
5.4
Recommended Operating Conditions
5.5
Thermal Information
5.6
Power Dissipation
5.7
Electrical Characteristics
5.8
Switching Characteristics - 250 kbps
5.9
Switching Characteristics - 1 Mbps
5.10
Switching Characteristics - 20 Mbps
5.11
Switching Characteristics - 50 Mbps
5.12
Typical Characteristics
6
Parameter Measurement Information
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagrams
7.3
Feature Description
7.3.1
±70-V Fault Protection
7.3.2
Integrated IEC ESD and EFT Protection
7.3.3
Driver Overvoltage and Overcurrent Protection
7.3.4
Enhanced Receiver Noise Immunity
7.3.5
Receiver Fail-Safe Operation
7.3.6
Low-Power Shutdown Mode
7.4
Device Functional Modes
8
Application and Implementation
8.1
Application Information
8.2
Typical Application
8.2.1
Design Requirements
8.2.1.1
Data Rate and Bus Length
8.2.1.2
Stub Length
8.2.1.3
Bus Loading
8.2.1.4
Transient Protection
8.2.2
Detailed Design Procedure
8.2.3
Application Curves
8.3
Power Supply Recommendations
8.4
Layout
8.4.1
Layout Guidelines
8.4.2
Layout Example
9
Device and Documentation Support
9.1
Device Support
9.1.1
Third-Party Products Disclaimer
9.2
Receiving Notification of Documentation Updates
9.3
Support Resources
9.4
Trademarks
9.5
Electrostatic Discharge Caution
9.6
Glossary
10
Revision History
11
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
D|14
MPDS177H
Thermal pad, mechanical data (Package|Pins)
Orderable Information
sllsfq9b_oa
sllsfq9b_pm
8.4.2
Layout Example
Figure 8-10
THVD2410V-EP, THVD2450V-EP (Half-Duplex) Layout Example