SLLSFR9A April   2024  – April 2024 THVD4411

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  ESD Ratings [IEC]
    4. 5.4  Recommended Operating Conditions
    5. 5.5  Thermal Information
    6. 5.6  Power Dissipation
    7. 5.7  Electrical Characteristics
    8. 5.8  Switching Characteristics_RS-485_500kbps
    9. 5.9  Switching Characteristics_RS-485_20Mbps
    10. 5.10 Switching Characteristics, Driver_RS232
    11. 5.11 Switching Characteristics, Receiver_RS232
    12. 5.12 Switching Characteristics_MODE switching
    13. 5.13 Switching Characteristics_RS-485_Termination resistor
    14. 5.14 Typical Characteristics
  7. Parameter Measurement Information
  8. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Integrated IEC ESD and EFT Protection
      2. 7.3.2 Protection Features
      3. 7.3.3 Receiver Fail-Safe Operation
      4. 7.3.4 Low-Power Shutdown Mode
      5. 7.3.5 On-chip Switchable Termination resistor
      6. 7.3.6 Operational Data Rate
      7. 7.3.7 Integrated Charge Pump for RS-232
    4. 7.4 Device Functional Modes
      1. 7.4.1 RS-485 Functionality
      2. 7.4.2 RS-232 Functionality
      3. 7.4.3 Mode Control
  9. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
        1. 8.2.1.1 Data Rate and Bus Length
        2. 8.2.1.2 Stub Length
        3. 8.2.1.3 Bus Loading
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. Device and Documentation Support
    1. 9.1 Device Support
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Switching Characteristics_RS-485_500kbps

500-kbps (with SLR = VIO) over recommended operating conditions. All typical values are at 25°C and supply voltage of VCC = 5 V , VIO = 3.3 V, unless otherwise noted. (1) 
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Driver
tr, tf Differential output rise/fall time RL = 54 Ω, CL = 50 pF
See Figure 6-3
VCC = 3 to 3.6 V, Typical at 3.3V 210 300 600 ns
VCC = 4.5 to 5.5 V, Typical at 5 V 250 300 600 ns
tPHL, tPLH Propagation delay VCC = 3 to 3.6 V, Typical at 3.3V 250 450 ns
VCC = 4.5 to 5.5 V, Typical at 5 V 250 450 ns
tSK(P) Pulse skew, |tPHL – tPLH| VCC = 3 to 3.6 V, Typical at 3.3V 2 15 ns
VCC = 4.5 to 5.5 V, Typical at 5 V 2 15 ns
tPHZ, tPLZ Disable time MODE1, MODE0 = 10 (half duplex) or 11 (full duplex)
See Figure 6-4 and Figure 6-5
80 150 ns
tPZH, tPZL Enable time MODE1, MODE0 = 11 (full duplex): receiver enabled 200 650 ns
Receiver
tr, tf Output rise/fall time CL = 15 pF See Figure 6-6  13 20 ns
tPHL, tPLH Propagation delay 700 1200 ns
tSK(P) Pulse skew, |tPHL – tPLH| 10 50 ns
tPHZ, tPLZ Disable time in half duplex mode MODE1, MODE0 = 10, TERM_TX = VIO See Figure 6-7  30 80 ns
tPZH(1) Enable time in half duplex mode 60 155 ns
tPZL(1) 450 1250 ns
tPZH(2),
tPZL(2)
Enable time from shutdown with TX disabled in full duplex mode DIR = 0 V; MODE1, MODE0 = 11 See Figure 6-8  7 16 μs
 A, B are RX input, Y/Z are driver output terminals in Full duplex mode