SLLSEV5D
July 2017 – June 2019
TIOL111
,
TIOL1113
,
TIOL1115
PRODUCTION DATA.
1
Features
2
Applications
3
Description
Device Images
Typical Application Diagram
4
Revision History
5
Pin Configuration and Functions
Pin Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
Switching Characteristics
6.7
Typical Characteristics
7
Parameter Measurement Information
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagrams
8.3
Feature Description
8.3.1
Wake Up Detection
8.3.2
Current Limit Configuration
8.3.3
Current Fault Detection, Indication and Auto Recovery
8.3.4
Thermal Warning, Thermal Shutdown
8.3.5
Fault Reporting (NFAULT)
8.3.6
Transceiver Function Tables
8.3.7
The Integrated Voltage Regulator (LDO)
8.3.8
Reverse Polarity Protection
8.3.9
Integrated Surge Protection and Transient Waveform Tolerance
8.3.10
Power Up Sequence (TIOL111)
8.3.11
Undervoltage Lock-Out (UVLO)
8.4
Device Functional Modes
8.4.1
NPN Configuration (N-Switch SIO Mode)
8.4.2
PNP Configuration (P-Switch SIO Mode)
8.4.3
Push-Pull, Communication Mode
9
Application and Implementation
9.1
Application Information
9.2
Typical Application
9.2.1
Design Requirements
9.2.2
Detailed Design Procedure
9.2.2.1
Maximum Junction Temperature Check
9.2.2.2
Driving Capacitive Loads
9.2.2.3
Driving Inductive Loads
9.2.3
Application Curves
10
Power Supply Recommendations
11
Layout
11.1
Layout Guidelines
11.2
Layout Example
12
Device and Documentation Support
12.1
Receiving Notification of Documentation Updates
12.2
Community Resources
12.3
Trademarks
12.4
Electrostatic Discharge Caution
12.5
Glossary
13
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
DMW|10
MPSS089
Thermal pad, mechanical data (Package|Pins)
Orderable Information
sllsev5d_oa
sllsev5d_pm
8.2
Functional Block Diagrams
Figure 11.
Block Diagram TIOL111
Figure 12.
Block Diagram TIOL111x