SLLSFS6A September   2024  – December 2024 TIOL221

PRODMIX  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 ESD Ratings - IEC Specifications
    4. 5.4 Recommended Operating Conditions
    5. 5.5 Thermal Information
    6. 5.6 Electrical Characteristics
    7. 5.7 Switching Characteristics
    8. 5.8 Typical Characteristics
  7. 6 Parameter Measurement Information
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagrams
    3. 7.3 Feature Description
      1. 7.3.1  Wake-Up Detection
      2. 7.3.2  Current Limit Configuration
        1. 7.3.2.1 Current Limit Configuration in Pin-Mode
        2. 7.3.2.2 Current Limit Configuration in SPI mode
      3. 7.3.3  CQ Current Fault Detection, Indication and Auto Recovery
      4. 7.3.4  DO Current Fault Detection, Indication and Auto Recovery
      5. 7.3.5  CQ and DI Receivers
      6. 7.3.6  Fault Reporting
        1. 7.3.6.1 Thermal Warning, Thermal Shutdown
      7. 7.3.7  The Integrated Voltage Regulator (LDO)
      8. 7.3.8  Reverse Polarity Protection
      9. 7.3.9  Integrated Surge Protection and Transient Waveform Tolerance
      10. 7.3.10 Undervoltage Lock-Out (UVLO)
      11. 7.3.11 Interrupt Function
    4. 7.4 Device Functional Modes
      1. 7.4.1 CQ and DO Tracking mode
    5. 7.5 SPI Programming
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Driving Capacitive Loads
        2. 8.2.2.2 Driving Inductive Loads
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 TIOL221 Registers
  11. 10Device and Documentation Support
    1. 10.1 Receiving Notification of Documentation Updates
    2. 10.2 Support Resources
    3. 10.3 Trademarks
    4. 10.4 Electrostatic Discharge Caution
    5. 10.5 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information
    1. 12.1 Mechanical Data

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • RGE|24
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.3.7 The Integrated Voltage Regulator (LDO)

The TIOL221 has an integrated linear voltage regulator (LDO) which can supply power to external components. The LDO is capable of delivering up to 20mA. LDO output level is configurable via VSEL pin. When VSEL is connected to GND, VOUT is configured to provide a 3.3V output with LP as the input supply. When VSEL is left floating, VOUT provides a 3.3V output, with V5IN as the supply input to reduce the power dissipation in the device. When VSEL is connected to VOUT, VOUT is set to 5V. The VSEL pin status is detected at power-up and VOUT output level is determined and latched until the next power-up cycle.

Table 7-5 LDO Output Configuration via VSEL pin
VSEL pin connectionVOUT
Connected to LM3.3V (supplied from LP)
Floating3.3V (supplied from V5IN)
Connected to VOUT5V

When configured for 5V output, the voltage regulator works with input voltage, LP, in the range of 7V to 36V with respect to LM. When configured for 3.3V output, the regulator can work with either V5IN supply (when VSEL is floating) or LP supply (when VSEL is connected to VOUT).

Selecting V5IN as the supply input for the 3.3V output on VOUT helps reduce the on-chip power dissipation. When VSEL is set to be floating, if the V5IN supply is not present or below the V5IN_UVLO threshold, the VOUT regulator is shut-off and RESET output is active.

The LDO is designed to be stable with standard ceramic capacitors with values of 1μF or larger at the output. X5R- and X7R-type capacitors are best because they have minimal variation in value and ESR over temperature. Maximum ESR must be less than 1Ω. With tolerance and dc bias effects, the minimum capacitance to make sure the output stability is 1μF.

The voltage regulator has an internal 35mA current limit to protect against initial startup inrush current due to large decoupling capacitors and accidental short circuit conditions.