SLLSFL4B february   2022  – june 2023 TIOS102 , TIOS1023 , TIOS1025

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Revision History
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 ESD Ratings - IEC Specifications
    4. 6.4 Recommended Operating Conditions
    5. 6.5 Thermal Information
    6. 6.6 Electrical Characteristics
    7. 6.7 Switching Characteristics
    8. 6.8 Typical Characteristics
  8. 7 Parameter Measurement Information
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagrams
    3. 8.3 Feature Description
      1. 8.3.1  Current Limit Configuration
      2. 8.3.2  Current Fault Detection, Indication and Auto Recovery
      3. 8.3.3  Thermal Warning, Thermal Shutdown
      4. 8.3.4  Fault Reporting (NFAULT)
      5. 8.3.5  Device Function Tables
      6. 8.3.6  The Integrated Voltage Regulator (LDO)
      7. 8.3.7  Reverse Polarity Protection
      8. 8.3.8  Integrated Surge Protection and Transient Waveform Tolerance
      9. 8.3.9  Power Up Sequence
      10. 8.3.10 Undervoltage Lock-Out (UVLO)
    4. 8.4 Device Functional Modes
      1. 8.4.1 NPN Configuration (N-Switch Mode)
      2. 8.4.2 PNP Configuration (P-Switch Mode)
      3. 8.4.3 Push-Pull Mode
  10. 9 Application Information Disclaimer
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Maximum Junction Temperature Check
        2. 9.2.2.2 Driving Capacitive Loads
        3. 9.2.2.3 Driving Inductive Loads
      3. 9.2.3 Application Curves
  11. 10Power Supply Recommendations
  12. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  13. 12Device and Documentation Support
    1. 12.1 Receiving Notification of Documentation Updates
    2. 12.2 Support Resources
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  14. 13Mechanical, Packaging, and Orderable Information
    1. 13.1 Mechanical Data

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5 Pin Configuration and Functions

GUID-20230117-CA0I-DWXC-WRRZ-4SCW2TL03T4C-low.svgFigure 5-1 TIOS1023, TIOS1025
DRC, 10-Pin VSON
(Top View)
GUID-20230117-CA0I-3KDK-TGXG-VDTKJJR72GJM-low.svgFigure 5-2 TIOS102
DRC, 10-Pin VSON
(Top View)
Table 5-1 Pin Functions (VSON Package)
PIN NOPIN

NAME

TypeDESCRIPTION
TIOS102TIOS1023, TIOS1025
1VCC_INVCC_OUTP3.3-V or 5-V linear regulator output; external 3.3-V or 5-V logic supply input for option without LDO.
2NFAULTNFAULTOFault indicator output signal to the microcontroller. Connect this pin via pull-up resistor to VCC_IN (TIOS102) or VCC_OUT (TIOS1023, TIOS1025)
3NCNC-Do not connect to GND. Leave floating
4ININITransmit data input from the local controller. No effect if EN is low. Logic high sets low-side switch. Logic low sets high-side switch. Weak internal pull-up.
5ENENIDriver enable input signal from the local controller. Logic low sets the OUT output at Hi-Z. Weak internal pull-down.
6ILIM_ADJILIM_ADJIInput for current limit adjustment. Connect resistor RSET between ILIM_ADJ and GND.
7GNDGND

GND

Device ground connection
8OUTOUTODriver output
9VCCVCCPSupply voltage (24 V nominal)
10NCNC-Do not connect to GND. Leave floating
Thermal PadThermal Pad—Connect to GND plane for optimal thermal and electrical performance
GUID-20230117-CA0I-NGQK-4733-FCWR6VQSN63J-low.svgFigure 5-3 TIOS1023L
YAH, 12-Pin DSBGA
(Top View)
GUID-20230117-CA0I-RXS9-QVMP-D7JLQTHSGKNW-low.svgFigure 5-4 TIOS102
YAH, 12-Pin DSBGA
(Top View)
Table 5-2 Pin Functions (DSBGA)
PIN NOPIN NAMETypeDESCRIPTION
TIOS102TIOS1023L
B3VCC_INVCC_OUTP3.3-V or 5-V linear regulator output; external 3.3-V or 5-V logic supply input for option without LDO.
C3NFAULTNFAULTOFault indicator output signal to the microcontroller. Connect this pin via pull-up resistor to VCC_IN (TIOS102) or VCC_OUT

(TIOS1023, TIOS1025)

D2TXTXITransmit data input from the local controller. No effect if EN is low. Logic high sets low-side switch. Logic low sets high-side switch. Weak internal pull-up.
D3ENENIDriver enable input signal from the local controller. Logic low sets the OUT output at Hi-Z. Weak internal pull-down.
B1ILIM_ADJILIM_ADJIInput for current limit adjustment. Connect resistor RSET between ILIM_ADJ and GND.
A1,

B2

GNDGNDGND

Device ground connection

A2OUTOUTOSwitch output
A3VCCVCCPSupply voltage (24 V nominal)
D1,

C2

NC

NC

-

Leave floating. Do not connect.

C1

NC

VSEL

I

TIOS102: Leave floating. Do not connect

TIOS1023L: VSEL: Connect to GND for 5V LDO output. Please leave this pin floating for 3.3V LDO output