SLOS080V september   1978  – april 2023 TL071 , TL071A , TL071B , TL071H , TL072 , TL072A , TL072B , TL072H , TL072M , TL074 , TL074A , TL074B , TL074H , TL074M

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information for Single Channel
    5. 6.5  Thermal Information for Dual Channel
    6. 6.6  Thermal Information for Quad Channel
    7. 6.7  Electrical Characteristics: TL07xH
    8. 6.8  Electrical Characteristics (DC): TL07xC, TL07xAC, TL07xBC, TL07xI, TL07xM
    9. 6.9  Electrical Characteristics (AC): TL07xC, TL07xAC, TL07xBC, TL07xI, TL07xM
    10. 6.10 Typical Characteristics: TL07xH
    11. 6.11 Typical Characteristics: All Devices Except TL07xH
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Total Harmonic Distortion
      2. 8.3.2 Slew Rate
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curve
    3. 9.3 Unity Gain Buffer
      1. 9.3.1 Design Requirements
      2. 9.3.2 Detailed Design Procedure
      3. 9.3.3 Application Curves
    4. 9.4 System Examples
    5. 9.5 Power Supply Recommendations
    6. 9.6 Layout
      1. 9.6.1 Layout Guidelines
      2. 9.6.2 Layout Example
  10. 10Device and Documentation Support
    1. 10.1 Receiving Notification of Documentation Updates
    2. 10.2 Support Resources
    3. 10.3 Trademarks
    4. 10.4 Electrostatic Discharge Caution
    5. 10.5 Glossary
  11. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

9.3.2 Detailed Design Procedure

  • Avoid input voltage values below 1 V to prevent phase reversal where output goes high.
  • Avoid input values below 4 V to prevent degraded VIO that results in an apparent gain greater than 1. This may cause instability in some second-order filter designs.