SLOS080V september   1978  – april 2023 TL071 , TL071A , TL071B , TL071H , TL072 , TL072A , TL072B , TL072H , TL072M , TL074 , TL074A , TL074B , TL074H , TL074M

PRODUCTION DATA  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information for Single Channel
    5. 6.5  Thermal Information for Dual Channel
    6. 6.6  Thermal Information for Quad Channel
    7. 6.7  Electrical Characteristics: TL07xH
    8. 6.8  Electrical Characteristics (DC): TL07xC, TL07xAC, TL07xBC, TL07xI, TL07xM
    9. 6.9  Electrical Characteristics (AC): TL07xC, TL07xAC, TL07xBC, TL07xI, TL07xM
    10. 6.10 Typical Characteristics: TL07xH
    11. 6.11 Typical Characteristics: All Devices Except TL07xH
  7. Parameter Measurement Information
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Total Harmonic Distortion
      2. 8.3.2 Slew Rate
    4. 8.4 Device Functional Modes
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curve
    3. 9.3 Unity Gain Buffer
      1. 9.3.1 Design Requirements
      2. 9.3.2 Detailed Design Procedure
      3. 9.3.3 Application Curves
    4. 9.4 System Examples
    5. 9.5 Power Supply Recommendations
    6. 9.6 Layout
      1. 9.6.1 Layout Guidelines
      2. 9.6.2 Layout Example
  10. 10Device and Documentation Support
    1. 10.1 Receiving Notification of Documentation Updates
    2. 10.2 Support Resources
    3. 10.3 Trademarks
    4. 10.4 Electrostatic Discharge Caution
    5. 10.5 Glossary
  11. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Electrical Characteristics (DC): TL07xC, TL07xAC, TL07xBC, TL07xI, TL07xM

For VS = (VCC+) – (VCC–) = ±15 V at TA = 25°C, unless otherwise noted
PARAMETER TEST CONDITIONS(1)(2) MIN TYP MAX UNIT
 
VOS Input offset voltage
VO = 0 V
RS = 50 Ω
TL07xC 3 10 mV
TA = Full range 13
TL07xAC 3 6
TA = Full range 7.5
TL07xBC 2 3
TA = Full range 5
TL07xI 3 6
TA = Full range 8
TL071M, TL072M 3 6
TA = Full range 9
TL074M 3 9
TA = Full range 15
dVOS/dT Input offset voltage drift VO = 0 V, RS = 50 Ω TA = Full range ±18 µV/℃
IOS Input offset current  VO = 0 V TL07xC 5 100 pA
TA = Full range 10 nA
TL07xAC, TL07xBC, TL07xI 5 100 pA
TA = Full range 2 nA
TL07xM 5 100 pA
TA = Full range 20 nA
IB Input bias current  VO = 0 V TL07xC, TL07xAC,
TL07xBC, TL07xI
65 200 pA
TA = Full range 7 nA
TL071M, TL072M 65 200 pA
TA = Full range 50 nA
TL074M 65 200 pA
TA = Full range 20 nA
VCM Common-mode voltage range ±11 –12 to 15 V
VOM Maximum peak output voltage swing RL = 10 kΩ ±12 ±13.5 V
RL ≥ 10 kΩ TA = Full range ±12
RL ≥ 2 kΩ ±10
AOL Open-loop voltage gain VO = 0 V TL07xC 25 200 V/mV
TA = Full range 15
TL07xAC, TL07xBC, TL07xI 50 200
TA = Full range 25
TL07xM 35 200
TA = Full range 15
GBW Gain-bandwidth product All NS and PS packages; All TL07xM devices 3 MHz
All other devices  5.25
RID Common-mode input resistance 1
CMRR Common-mode rejection ratio VIC = VICR(min)
VO = 0 V
RS = 50 Ω
TL07xC 70 100 dB
TL07xAC, TL07xBC, TL07xI 75 100
TL07xM 80 86
PSRR Input offset voltage versus power supply VS = ±9 V to ± 18 V
VO = 0 V
RS = 50 Ω
TL07xC 70 100 dB
TL07xAC, TL07xBC, TL07xI 80 100
TL07xM 80 86
IQ Quiescent current per amplifier VO = 0 V; no load 1.4 2.5 mA
Channel separation f = 0 Hz 1 µV/V
All characteristics are measured under open-loop conditions with zero common-mode voltage, unless otherwise specified.
Full range is TA = 0°C to 70°C for the TL07xC, TL07xAC, and TL07xBC; TA = –40°C to 85°C for the TL07xI; and TA = –55°C to 125°C for the TL07xM.