SLVS062N December   1991  – October 2016 TL1431 , TL1431M

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings - TL1431C, TL1431Q
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics - TL1431C
    6. 6.6 Electrical Characteristics - TL1431Q
    7. 6.7 Electrical Characteristics - TL1431M
    8. 6.8 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
    4. 8.4 Device Functional Modes
      1. 8.4.1 Open Loop (Comparator)
      2. 8.4.2 Closed Loop
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Programming Output/Cathode Voltage
        2. 9.2.2.2 Total Accuracy
        3. 9.2.2.3 Stability
        4. 9.2.2.4 Start-up Time
      3. 9.2.3 Application Curve
    3. 9.3 System Examples
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Related Links
    3. 12.3 Receiving Notification of Documentation Updates
    4. 12.4 Community Resources
    5. 12.5 Trademarks
    6. 12.6 Electrostatic Discharge Caution
    7. 12.7 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5 Pin Configuration and Functions

D Package
8-Pin SOIC
Top View
ANODE terminals are connected internally
JG or PW Package
8-Pin CDIP or TSSOP
Top View
LP Package
3-Pin TO-92
Top View
TL1431 TL1431M po_04_lvs062.gif
FK Package
20-Pin LCCC
Top View

Pin Functions

PIN I/O DESCRIPTION
NAME SOIC CDIP,
TSSOP		 TO-92 LCCC
ANODE 2, 3, 6, 7 6 2 15 O Common pin, normally connected to ground
CATHODE 1 1 1 2 I/O Shunt current/voltage input
REF 8 8 3 20 I Threshold relative to common ground
NC 4, 5 2, 3, 4, 5, 7 — 1, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 16, 17, 18, 19 — No internal connection