SLVS719G June   2008  – January 2015 TL1963A

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Description (continued)
  6. 6 Device Comparison Table
  7. 7 Pin Configuration and Functions
  8. 8 Specifications
    1. 8.1 Absolute Maximum Ratings
    2. 8.2 ESD Ratings
    3. 8.3 Recommended Operating Conditions
    4. 8.4 Thermal Information
    5. 8.5 Electrical Characteristics
    6. 8.6 Typical Characteristics
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Overload Recovery
      2. 9.3.2 Output Voltage Noise
      3. 9.3.3 Protection Features
    4. 9.4 Device Functional Modes
  10. 10Application and Implementation
    1. 10.1 Application Information
      1. 10.1.1 Output Capacitance and Transient Response
    2. 10.2 Typical Applications
      1. 10.2.1 Adjustable Output Operation
        1. 10.2.1.1 Design Requirements
        2. 10.2.1.2 Detailed Design Procedure
          1. 10.2.1.2.1 Fixed Operation
        3. 10.2.1.3 Application Curve
      2. 10.2.2 Paralleling Regulators for Higher Output Current
        1. 10.2.2.1 Design Requirements
        2. 10.2.2.2 Detailed Design Procedure
        3. 10.2.2.3 Application Curve
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
    3. 12.3 Thermal Considerations
      1. 12.3.1 Calculating Junction Temperature
  13. 13Device and Documentation Support
    1. 13.1 Related Links
    2. 13.2 Trademarks
    3. 13.3 Electrostatic Discharge Caution
    4. 13.4 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7 Pin Configuration and Functions

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Pin Functions

PIN I/O DESCRIPTION
NAME DCQ DCY KTT
ADJ 5 — 5 I Adjust. For the adjustable TL1963A, this is the input to the error amplifier. This pin is clamped internally to ±7 V. It has a bias current of 3 μA that flows into the pin. The ADJ pin voltage is 1.21 V referenced to ground, and the output voltage range is 1.21 V to 20 V.
GND 3, 6 2, 4 3 — Ground
IN 2 1 2 I Input. Power is supplied to the device through the IN pin. A bypass capacitor is required on this pin if the device is more than six inches away from the main input filter capacitor. In general, the output impedance of a battery rises with frequency, so it is advisable to include a bypass capacitor in battery-powered circuits. A bypass capacitor (ceramic) in the range of 1 μF to 10 μF is sufficient. The TL1963A-xx regulators are designed to withstand reverse voltages on the IN pin with respect to ground and the OUT pin. In the case of a reverse input, which can happen if a battery is plugged in backwards, the device acts as if there is a diode in series with its input. There is no reverse-current flow into the regulator, and no reverse voltage appears at the load. The device protects both itself and the load.
OUT 4 3 4 O Output. The output supplies power to the load. A minimum output capacitor (ceramic) of 10 μF is required to prevent oscillations. Larger output capacitors are required for applications with large transient loads to limit peak voltage transients.
SENSE 5 — 5 I Sense. For fixed voltage versions of the TL1963A-xx (TL1963A-1.5, TL1963A-1.8, TL1963A-2.5, and TL1963A-3.3), the SENSE pin is the input to the error amplifier. Optimum regulation is obtained at the point where the SENSE pin is connected to the OUT pin of the regulator. In critical applications, small voltage drops are caused by the resistance (RP) of PC traces between the regulator and the load. These may be eliminated by connecting the SENSE pin to the output at the load as shown in Figure 32. Note that the voltage drop across the external PCB traces adds to the dropout voltage of the regulator. The SENSE pin bias current is 600 μA at the rated output voltage. The SENSE pin can be pulled below ground (as in a dual supply system in which the regulator load is returned to a negative supply) and still allow the device to start and operate.
SHDN 1 — 1 I Shutdown. The SHDN pin is used to put the TL1963A-xx regulators into a low-power shutdown state. The output is off when the SHDN pin is pulled low. The SHDN pin can be driven either by 5-V logic or open-collector logic with a pullup resistor. The pullup resistor is required to supply the pullup current of the open-collector gate, normally several microamperes, and the SHDN pin current, typically 3 μA. If unused, the SHDN pin must be connected to VIN. The device is in the low-power shutdown state if the SHDN pin is not connected.
Thermal Pad — — — — For the KTT package, the exposed thermal pad is connected to ground and must be soldered to the PCB for rated thermal performance.