SLLS890C August 2008 – April 2024 TL28L92
PRODUCTION DATA
When operating in the special time-out mode, it is possible to generate what appears to be a false interrupt, that is, an interrupt without a cause. This can result when a time-out interrupt occurs. Then, before the interrupt is serviced, another character is received, that is, the data stream has started again. (The interrupt latency is longer than the pause in the data stream.) In this case, when a new character has been received, the counter/timer is restarted by the receiver, thereby withdrawing its interrupt. If, at this time, the interrupt service begins for the previously seen interrupt, a read of the ISR shows the Counter Ready bit not set. If nothing else is interrupting, this read of the ISR returns a 0x00 character. This action can present the appearance of a spurious interrupt.