SLLS890C August 2008 – April 2024 TL28L92
PRODUCTION DATA
Clear To Send (CTS) is usually meant to be a signal to the transmitter meaning that it may transmit data to the receiver. The CTS input is on pin IP0 for TxA and on IP1 for TxB. The CTS signal is active LOW; thus, it is called CTSAN for TxA and CTSBN for TxB. RTS is usually meant to be a signal from the receiver indicating that the receiver is ready to receive data. It is also active LOW and is, thus, called RTSAN for RxA and RTSBN for RxB. RTSAN is on pin OP0 and RTSBN is on OP1. A receiver’s RTS output is usually connected to the CTS input of the associated transmitter. Therefore, one could say that RTS and CTS are different ends of the same wire.
MR2[4] is the bit that allows the transmitter to be controlled by the CTS pin (IP0 or IP1). When this bit is set to one AND the CTS input is driven HIGH, the transmitter stops sending data at the end of the present character being serialized. It is usually the RTS output of the receiver that is connected to the transmitter CTS input. The receiver is set RTS HIGH when the receiver FIFO is full AND the start bit of the 9th or 17th character is sensed. Transmission then stops with 9 or 17 valid characters in the receiver. When MR2[4] is set to one, CTSN must be at zero for the transmitter to operate. If MR2[4] is set to zero, the IP pin has no effect on the operation of the transmitter. MR1[7] is the bit that allows the receiver to control OP0. The value of the pin is set when OP0 (or OP1) is controlled by the receiver.