SGLS302G March 2005 – May 2020 TL431-Q1 , TL432-Q1
PRODUCTION DATA.
Refer to the PDF data sheet for device specific package drawings
For the TL43x-Q1 to properly be used as a comparator, the logic output must be readable by the receiving logic device. This is accomplished by knowing the input high and low level threshold voltage levels, typically denoted by VIH and VIL.
As seen in Figure 26, the TL43x-Q1's output low level voltage in open-loop or comparator mode is approximately 2 V, which is typically sufficient for 5-V supplied logic. However, would not work for 3.3-V and 1.8-V supplied logic. To accommodate this a resistive divider can be tied to the output to attenuate the output voltage to a voltage legible to the receiving low voltage logic device.
The TL43x-Q1's output high voltage is equal to VSUP due to the TL43x-Q1 being open-collector. If VSUP is much higher than the receiving logic's maximum input voltage tolerance, the output must be attenuated to accommodate the outgoing logic's reliability.
When using a resistive divider on the output, ensure the sum of the resistive divider (R1 and R2 in Figure 24) is much greater than RSUP to not interfere with the TL43x-Q1's ability to pull close to VSUP when turning off.