SLDS162B March   2009  – December 2015 TLC59108F

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 I2C Interface Timing Requirements
    7. 6.7 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Power-On Reset
      2. 8.3.2 External Reset
      3. 8.3.3 Software ResetFixed address typo in the Software Reset Section
      4. 8.3.4 Individual Brightness Control With Group Dimming or Blinking
    4. 8.4 Device Functional Modes
    5. 8.5 Programming
      1. 8.5.1 Device Address
      2. 8.5.2 Regular I2C Bus Slave Address
      3. 8.5.3 LED All Call I2C Bus Address
      4. 8.5.4 LED Sub Call I2C Bus Address
      5. 8.5.5 Software Reset I2C Bus Address
      6. 8.5.6 Characteristics of the I2C Bus
        1. 8.5.6.1 Bit Transfer
        2. 8.5.6.2 Start and Stop Conditions
      7. 8.5.7 System Configuration
      8. 8.5.8 Acknowledge
    6. 8.6 Register Maps
      1. 8.6.1 Control Register
      2. 8.6.2 Mode Register 1 (MODE1)
      3. 8.6.3 Mode Register 2 (MODE2)
      4. 8.6.4 Individual Brightness Control Registers (PWM0-PWM7)
      5. 8.6.5 Group Duty Cycle Control Register (GRPPWM)
      6. 8.6.6 Group Frequency Register (GRPFREQ)
      7. 8.6.7 LED Driver Output State Registers (LEDOUT0, LEDOUT1)
      8. 8.6.8 I2C Bus Sub-Address Registers 1 to 3 (SUBADR1-SUBADR3)
      9. 8.6.9 LED All Call I2C Bus Address Register (ALLCALLADR)
  9. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Setting LED Current
      2. 9.1.2 PWM Brightness Dimming
      3. 9.1.3 TLC59108 and TLC59108F DifferencesTLC59108 and TLC59108F Differences section.
      4. 9.1.4 Connecting Multiple Devices
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curve
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Community Resources
    2. 12.2 Trademarks
    3. 12.3 Electrostatic Discharge Caution
    4. 12.4 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7 Parameter Measurement Information

TLC59108F pmi_reset_lds162.gif Figure 3. Definition of Reset Timing
TLC59108F pmi_i2c_tmng_lds162.gif Figure 4. Definition of Timing
TLC59108F pmi_i2c_bus_lds162.gif
Rise and fall times refer to VIL and VIH.
Figure 5. I2C Bus Timing
TLC59108F pmi_test_cx_lds162.gif
RL = Load resistance for SDA and SCL; should be >1 kΩ at 3-mA or lower current.
CL = Load capacitance; includes jig and probe capacitance.
RT = Termination resistance; should be equal to the output impedance (ZO) of the pulse generator.
Figure 6. Test Circuit for Switching Characteristics