SLDS157E
February 2008 – December 2014
TLC59116
PRODUCTION DATA.
1
Features
2
Applications
3
Description
4
Revision History
5
Description (continued)
6
Pin Configuration and Functions
7
Specifications
7.1
Absolute Maximum Ratings
7.2
Handling Ratings
7.3
Recommended Operating Conditions
7.4
Thermal Information
7.5
Electrical Characteristics
7.6
Timing Requirements
7.7
Typical Characteristics
8
Parameter Measurement Information
9
Detailed Description
9.1
Overview
9.2
Functional Block Diagram
9.3
Feature Description
9.3.1
Open-Circuit Detection
9.3.2
Overtemperature Detection and Shutdown
9.3.3
Power-On Reset (POR)
9.3.4
External Reset
9.3.5
Software Reset
9.3.6
Individual Brightness Control With Group Dimming/Blinking
9.4
Device Functional Modes
9.4.1
Active
9.4.2
Standby
9.5
Register Maps
9.5.1
Mode Register 1 (MODE1)"SLEEP" to "OSC" in Mode Register 1 (MODE1) Table.
9.5.2
Mode Register 2 (MODE2)
9.5.3
Brightness Control Registers 0 to 15 (PWM0 to PWM15)
9.5.4
Group Duty Cycle Control Register (GRPPWM)
9.5.5
Group Frequency Register (GRPFREQ)
9.5.6
LED Driver Output State Registers 0 to 3 (LEDOUT0 to LEDOUT3)
9.5.7
I2C Bus Subaddress Registers 1 to 3 (SUBADR1 to SUBADR3)
9.5.8
LED All Call I2C Bus Address Register (ALLCALLADR)
9.5.9
Output Gain Control Register (IREF)
9.5.10
Error Flags Registers (EFLAG1, EFLAG2)
9.5.11
Control Register
10
Application and Implementation
10.1
Application Information
10.1.1
Device Address
10.1.2
Regular I2C Bus Slave Address
10.1.3
LED All Call I2C Bus Address
10.1.4
LED Sub Call I2C Bus Address
10.1.5
Software Reset I2C Bus Address
10.1.6
Characteristics of the I2C Bus
10.1.6.1
Bit Transfer
10.1.6.2
Start and Stop Conditions
10.1.6.3
Acknowledge
10.1.7
System Configuration
10.1.8
Constant Current Output
10.2
Typical Application
10.2.1
Design Requirements
10.2.2
Detailed Design Procedure
10.2.2.1
Adjusting Output Current
10.2.3
Application Curve
11
Power Supply Recommendations
12
Layout
12.1
Layout Guidelines
12.2
Layout Example
12.3
Thermal Considerations
13
Device and Documentation Support
13.1
Trademarks
13.2
Electrostatic Discharge Caution
13.3
Glossary
14
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
PW|28
MPDS364
RHB|32
MPQF130D
Thermal pad, mechanical data (Package|Pins)
RHB|32
QFND029X
Orderable Information
slds157e_oa
slds157e_pm
8 Parameter Measurement Information
Figure 3. Reset Timing
Figure 4. Definition of Timing
NOTE: Rise and fall times refer to V
IL
and V
IH
.
Figure 5. I
2
C Bus Timing
NOTE:
R
L
= Load resistance for SDA and SCL; should be >1 kΩ at 3-mA or lower current
C
L
= Load capacitance; includes jig and probe capacitance
R
T
= Termination resistance; should be equal to the output impedance (Z
O
) of the pulse generator
Figure 6. Test Circuit for Switching Characteristics