SLVSA51E March   2010  – September 2016 TLC5940-EP

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. 7 Parameter Measurement Information
    1. 7.1 Test Parameter Equations
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Serial Interface
      2. 8.3.2 Error Information Output
      3. 8.3.3 TEF: Thermal Error Flag
      4. 8.3.4 LOD: LED Open Detection
      5. 8.3.5 Delay Between Outputs
      6. 8.3.6 Output Enable
      7. 8.3.7 Setting Maximum Channel Current
    4. 8.4 Device Functional Modes
      1. 8.4.1 Operating Modes
      2. 8.4.2 Setting Dot Correction
      3. 8.4.3 Setting Grayscale
      4. 8.4.4 Status Information Output
      5. 8.4.5 Grayscale PWM Operation
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedures
        1. 9.2.2.1 Serial Data Transfer Rate
        2. 9.2.2.2 Grayscale (GS) Data
      3. 9.2.3 Application Curve
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
    3. 11.3 Power Dissipation Calculation
  12. 12Device and Documentation Support
    1. 12.1 Receiving Notification of Documentation Updates
    2. 12.2 Community Resources
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)(1) (2)
MIN MAX UNIT
Input voltage(3) VCC –0.3 6 V
V(BLANK), V(DCPRG), V(SCLK), V(XLAT), V(SIN), V(GSCLK), V(IREF) –0.3 VCC + 0.3 V
Output voltage V(SOUT), V(XERR) –0.3 VCC + 0.3 V
V(OUT0) to V(OUT15) –0.3 18 V
Output current (dc) IO 130 mA
EEPROM program V(VPRG) –0.3 24 V
EEPROM write cycles 25
Package thermal impedance See Thermal Information
Operating ambient temperature, TA –40 125 °C
Storage temperature, Tstg –55 150 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions is not implied. Exposure to absolute maximum rated conditions for extended periods may affect device reliability.
(2) Long-term high-temperature storage and/or extended use at maximum recommended operating conditions may result in a reduction of overall device life. See www.ti.com/ep_quality for additional information on enhanced plastic packaging.
(3) All voltage values are with respect to network ground terminal.

6.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins(1) ±2000 V
Charged device model (CDM), per JEDEC specification JESD22-C101, all pins(2) ±500
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.3 Recommended Operating Conditions

MIN NOM MAX UNIT
DC CHARACTERISTICS
VCC Supply Voltage 3 5.5 V
VO Voltage applied to output (OUT0–OUT15) 17 V
VIH High-level input voltage 0.8 VCC VCC V
VIL Low-level input voltage GND 0.2 VCC V
IOH High-level output current VCC = 5 V at SOUT –1 mA
IOL Low-level output current VCC = 5 V at SOUT 1 mA
IOLC Constant output current OUT0 to OUT15 –40°C to 125°C 72 mA
–40°C to 85°C, VCC < 3.6 V 60
–40°C to 85°C, VCC > 3.6 V 120
V(VPRG) EEPROM program voltage 20 22 23 V
TA Operating free-air temperature –40 125 °C
AC CHARACTERISTICS (2)
f(SCLK) Data shift clock frequency SCLK 30 MHz
f(GSCLK) Grayscale clock frequency GSCLK 30 MHz
twh0/twl0 SCLK pulse duration SCLK = H/L (see Figure 12) 16 ns
twh1/twl1 GSCLK pulse duration GSCLK = H/L (see Figure 12) 16 ns
twh2 XLAT pulse duration XLAT = H (see Figure 12) 20 ns
twh3 BLANK pulse duration BLANK = H (see Figure 12) 20 ns
tsu0 Setup time SIN to SCLK ↑(1) (see Figure 12) 5 ns
tsu1 SCLK ↓ to XLAT ↑ (see Figure 12) 10 ns
tsu2 VPRG ↑ ↓ to SCLK ↑ (see Figure 12) 10 ns
tsu3 VPRG ↑ ↓XLAT ↑ (see Figure 12) 10 ns
tsu4 BLANK ↓ to GSCLK ↑ (see Figure 12) 10 ns
tsu5 XLAT ↑ to GSCLK ↑ (see Figure 12) 30 ns
tsu6 VPRG ↑ to DCPRG ↑ (see Figure 17) 1 ms
th0 Hold time SCLK ↑ to SIN (see Figure 12) 3 ns
th1 XLAT ↓ to SCLK ↑ (see Figure 12) 10 ns
th2 SCLK ↑ to VPRG ↑ ↓ (see Figure 12) 10 ns
th3 XLAT ↓ to VPRG ↑ ↓ (see Figure 12) 10 ns
th4 GSCLK ↑ to BLANK ↑ (see Figure 12) 10 ns
th5 DCPRG ↓ to VPRG ↓ (see Figure 12) 1 ms
tprog Programming time for EEPROM (see Figure 17) 20 ms
(1) ↑ and ↓ indicates a rising edge, and a falling edge respectively.
(2) VCC = 3 V to 5.5 V, TA = –40°C to 125°C (unless otherwise noted)

6.4 Thermal Information

THERMAL METRIC(1) TLC5940-EP UNIT
RHB (VQFN) PWP (HTSSOP)
32 PINS 28 PINS
RθJA Junction-to-ambient thermal resistance 36.7 34.3 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 18.9 36.8 °C/W
RθJB Junction-to-board thermal resistance 15.9 8.5 °C/W
ψJT Junction-to-top characterization parameter 0.6 0.3 °C/W
ψJB Junction-to-board characterization parameter 15.8 8.7 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance 2.3 1.6 °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.

6.5 Electrical Characteristics

VCC = 3 V to 5.5 V, TA = –40°C to 125°C (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
VOH High-level output voltage IOH = –1 mA, SOUT VCC –0.5 V
VOL Low-level output voltage IOL = 1 mA, SOUT 0.5 V
II Input current VI = VCC or GND; BLANK, DCPRG, GSCLK, SCLK, SIN, XLAT –1 1 µA
VI = GND; VPRG –2 2
VI = VCC; VPRG 50
VI = 21 V; VPRG; DCPRG = VCC 4 10 mA
ICC Supply current No data transfer, all output OFF,
VO = 1 V, R(IREF) = 10 kΩ		 0.9 6 mA
No data transfer, all output OFF,
VO = 1 V, R(IREF) = 1.3 kΩ		 5.2 12
Data transfer 30 MHz, all output ON,
VO = 1 V, R(IREF) = 1.3 kΩ		 16
Data transfer 30 MHz, all output ON,
VO = 1 V, R(IREF) = 640 Ω		 30
IO(LC) Constant sink current (see Figure 10) All output ON, VO = 1 V, R(IREF) = 640 Ω, 25°C 54 61 69 mA
All output ON, VO = 1 V, R(IREF) = 640 Ω, Full temperature 42 61 72
Ilkg Leakage output current All output OFF, VO = 15 V, R(IREF) = 640 Ω,
OUT0 to OUT15		 ±1 µA
ΔIO(LC0) Constant sink current error (see Figure 10) All output ON, VO = 1 V, R(IREF) = 640 Ω,
OUT0 to OUT15, 25°C		 ±4%
All output ON, VO = 1 V, R(IREF) = 640 Ω,
OUT0 to OUT15(1), Full temperature 		±12%
All output ON, VO = 1 V, R(IREF) = 1300 Ω,
OUT0 to OUT15, 25°C		 ±4%
All output ON, VO = 1 V, R(IREF) = 1300 Ω,
OUT0 to OUT15(1), Full temperature		 ±8%
ΔIO(LC1) Constant sink current error (see Figure 10) Device to device, Averaged current from OUT0 to OUT15, R(IREF) = 1920 Ω (20 mA)(2) –2%
0.4%
ΔIO(LC2) Constant sink current error (see Figure 10) Device to device, Averaged current from OUT0 to OUT15, R(IREF) = 480 Ω (80 mA)(2) –2.7%
2%
ΔIO(LC3) Line regulation (see Figure 10) All output ON, VO = 1 V, R(IREF) = 640 Ω
OUT0 to OUT15(3), 25°C		 ±4 %/V
All output ON, VO = 1 V, R(IREF) = 640 Ω
OUT0 to OUT15(3), Full temperature		 ±11
All output ON, VO = 1 V, R(IREF) = 1300 Ω ,
OUT0 to OUT15(3), 25°C		 ±4
All output ON, VO = 1 V, R(IREF) = 1300 Ω,
OUT0 to OUT15(3), Full temperature		 ±4
ΔIO(LC4) Load regulation (see Figure 10) All output ON, VO = 1 V to 3 V, R(IREF) = 640 Ω,
OUT0 to OUT15(4), 25°C		 ±6 %/V
All output ON, VO = 1 V to 3 V, R(IREF) = 640 Ω,
OUT0 to OUT15(4), Full temperature 		±20
All output ON, VO = 1 V to 3 V, R(IREF) = 1300 Ω,
OUT0 to OUT15(4), 25°C 		±6
All output ON, VO = 1 V to 3 V, R(IREF) = 1300 Ω,
OUT0 to OUT15(4), Full temperature 		±6
T(TEF) Thermal error flag threshold Junction temperature(5) 150 170 °C
V(LED) LED open detection threshold 0.3 0.4 V
V(IREF) Reference voltage
output		 R(IREF) = 640 Ω 1.2 1.24 1.28 V
(1) The deviation of each output from the average of OUT0-15 constant current. It is calculated by Equation 1.
(2) The deviation of average of OUT1-15 constant current from the ideal constant-current value. It is calculated by Equation 2. The ideal current is calculated by Equation 3.
(3) The line regulation is calculated by Equation 4.
(4) The load regulation is calculated by Equation 5.
(5) Not tested. Specified by design

6.6 Switching Characteristics

VCC = 3 V to 5.5 V, TA = –40°C to 125°C (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
tr0 Rise time SOUT 16 ns
tr1 OUTn, VCC = 5 V, TA = 60°C, DCn = 3 Fh 10 30
tf0 Fall time SOUT 16 ns
tf1 OUTn, VCC = 5 V, TA = 60°C, DCn = 3 Fh 10 30
tpd0 Propagation delay time SCLK to SOUT (see Figure 12) 30 ns
tpd1 BLANK to OUT0 60 ns
tpd2 OUTn to XERR (see Figure 12 ) 1000 ns
tpd3 GSCLK to OUT0 (see Figure 12 ) 60 ns
tpd4 XLAT to IOUT (dot correction) (see Figure 12 ) 60 ns
tpd5 DCPRG to OUT0 (see Figure 12) 30 ns
td Output delay time OUTn to OUT(n+1) (see Figure 12 ) 20 30 ns
ton-err Output on-time error touton– Tgsclk (see Figure 12), GSn = 01 h, GSCLK = 11 MHz 10 –50 –90 ns

6.7 Typical Characteristics

TLC5940-EP resis2_v_io_lvs515.gif
Figure 1. Reference Resistor vs Output Current
TLC5940-EP io_vo_lvs515.gif
Figure 3. Output Current vs Output Voltage
TLC5940-EP io_ta_lvs515.gif
Figure 5. Constant Output Current, ΔIOLC vs Ambient Temperature
TLC5940-EP io_dot_lvs515.gif
Figure 7. Output Current vs DOT Correction Linearity (ABS Value)
TLC5940-EP pwrdwn_vs_ta_lvsa51.gif
Figure 2. Power Dissipation Rate vs Free-Air Temperature
TLC5940-EP io2_vo_lvs515.gif
Figure 4. Output Current vs Output Voltage
TLC5940-EP cio_io_lvs515.gif
Figure 6. Constant Output Current, ΔIOLC vs Output Current
TLC5940-EP io_dot2_lvs515.gif
Figure 8. Output Current vs DOT Correction Linearity (ABS Value)