SLDS165A December   2008  – December 2014 TLC5941-Q1

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. 7 Parameter Measurement Information
    1. 7.1 Pin Equivalent Input and Output Schematic Diagrams
    2. 7.2 Test Parameter Equations
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Serial Interface
      2. 8.3.2 Error Information Output
      3. 8.3.3 TEF: Thermal Error Flag
      4. 8.3.4 LOD: LED Open Detection
      5. 8.3.5 Delay Between Outputs
      6. 8.3.6 Output Enable
      7. 8.3.7 Status Information Output
      8. 8.3.8 Grayscale PWM Operation
        1. 8.3.8.1 Output On Time
    4. 8.4 Device Functional Modes
      1. 8.4.1 Operating Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Setting Maximum Channel Current
        2. 9.2.2.2 Power Dissipation Calculation
        3. 9.2.2.3 Setting Dot Correction
        4. 9.2.2.4 Setting Grayscale
        5. 9.2.2.5 Serial Data Transfer Rate
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Trademarks
    2. 12.2 Electrostatic Discharge Caution
    3. 12.3 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)(1)
MIN MAX UNIT
Input voltage, VI(2) VCC –0.3 6 V
V(BLANK), V(SCLK), V(XLAT), V(MODE), V(SIN), V(GSCLK), V(IREF), V(TEST) –0.3 VCC + 0.3
Output voltage, VO V(SOUT), V(XERR) –0.3 VCC + 0.3 V
V(OUT0) to V(OUT15) –0.3 18
Output current (DC), IO 90 mA
Operating junction temperature, TJ(max) 150 °C
Storage temperature, Tstg –55 150
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute maximum rated conditions for extended periods may affect device reliability.
(2) All voltage values are with respect to network ground terminal.

6.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human body model (HBM), per AEC Q100-002(1) ±2000 V
Charged device model (CDM), per AEC Q100-011 Corner pins (1, 14, 15, and 28) ±750
Other pins ±500
(1) AEC Q100-002 indicates HBM stressing is done in accordance with the ANSI/ESDA/JEDEC JS-001 specification.

6.3 Recommended Operating Conditions

MIN MAX UNIT
DC CHARACTERISTICS
VCC Supply voltage 3 5.5 V
VO Voltage applied to output (OUT0–OUT15) 17 V
VIH High-level input voltage 0.8 VCC VCC V
VIL Low-level input voltage GND 0.2 VCC V
IOH High-level output current VCC = 5 V at SOUT –1 mA
IOL Low-level output current VCC = 5 V at SOUT, XERR 1 mA
IOLC Constant output current OUT0 to OUT15 60 mA
TJ Operating junction temperature –40 125 °C
AC CHARACTERISTICS
f(SCLK) Data shift clock frequency SCLK 30 MHz
f(GSCLK) Grayscale clock frequency GSCLK 30 MHz
twh0/twl0 SCLK pulse duration SCLK = H/L (see Figure 12) 16 ns
twh1/twl1 GSCLK pulse duration GSCLK = H/L (see Figure 12) 16 ns
twh2 XLAT pulse duration XLAT = H (see Figure 12) 20 ns
twh3 BLANK pulse duration BLANK = H (see Figure 12) 20 ns
tsu0 Setup time SIN to SCLK↑ (see Figure 12) 5 ns
tsu1 Setup time SCLK↓ to XLAT↑ (see Figure 12) 10 ns
tsu2 Setup time MODE↑↓ to SCLK↑ (see Figure 12) 10 ns
tsu3 Setup time MODE↑↓ to XLAT↑ (see Figure 12) 10 ns
tsu4 Setup time BLANK↓ to GSCLK↑ (see Figure 12) 10 ns
tsu5 Setup time XLAT↑ to GSCLK↑ (see Figure 12) 30 ns
th0 Hold time SCLK↑ to SIN (see Figure 12) 3 ns
th1 Hold time XLAT↓ to SCLK↑ (see Figure 12) 10 ns
th2 Hold time SCLK↑ to MODE↑↓ (see Figure 12) 10 ns
th3 Hold time XLAT↓ to MODE↑↓ (see Figure 12) 10 ns
th4 Hold time GSCLK↑ to BLANK↑ (see Figure 12) 10 ns

6.4 Thermal Information

THERMAL METRIC(1) TLC5941-Q1 UNIT
PWP
28 PINS
RθJA Junction-to-ambient thermal resistance(2)(3) 36.7 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 18.9
RθJB Junction-to-board thermal resistance 15.9
ψJT Junction-to-top characterization parameter 0.6
ψJB Junction-to-board characterization parameter 15.8
RθJC(bot) Junction-to-case (bottom) thermal resistance 2.3
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
(2) The package thermal impedance is calculated in accordance with JESD 51-7.
(3) With PowerPAD soldered on PCB with 2-oz trace of copper. For further information see the TI application report, PowerPAD™ Thermally Enhanced Package, SLMA002.

6.5 Electrical Characteristics

VCC = 3 V to 5.5 V, TJ = –40°C to 125°C (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
VOH High-level output voltage IOH = –1 mA, SOUT VCC – 0.5 V
VOL Low-level output voltage IOL = 1 mA, SOUT 0.5 V
II Input current VI = VCC or GND,
BLANK, TEST, GSCLK, SCLK, SIN, XLAT		 –1 1 μA
VI = GND, MODE pin –1 1
VI = VCC, MODE pin 50
ICC Supply current No data transfer, all output OFF, VO = 1 V,
R(IREF) = 10 kΩ		 0.9 6 mA
No data transfer, all output OFF, VO = 1 V,
R(IREF) = 1.3 kΩ		 5.2 12
Data transfer 30 MHz, all output ON, VO = 1 V,
R(IREF) = 1.3 kΩ		 16 25
Data transfer 30 MHz, all output ON, VO = 1 V,
R(IREF) = 640 Ω		 30 60
IO(LC) Constant output current All output ON, VO = 1 V, R(IREF) = 640 Ω 54 61 69 mA
Ilkg Leakage output current All output OFF, VO = 15 V, R(IREF) = 640 Ω,
OUT0 to OUT15		 0.1 μA
ΔIO(LC0) Constant sink current error All output ON, VO = 1 V, R(IREF) = 640 Ω,
OUT0 to OUT15, TA = –20°C to 85°C(2)		 ±1% ±4%
All output ON, VO = 1 V, R(IREF) = 640 Ω,
OUT0 to OUT15(2)		 ±1% ±8%
ΔIO(LC1) Constant sink current error Device to device, averaged current from
OUT0 to OUT15,R(IREF) = 1920 Ω (20 mA)(3)		 0.4% ±4%
ΔIO(LC2) Line regulation All output ON, VO = 1 V, R(IREF) = 640 Ω,
OUT0 to OUT15, VCC = 3 V to 5.5 V(4)		 ±1 ±4 %/V
ΔIO(LC3) Load regulation All output ON, VO = 1 V to 3 V, R(IREF) = 640 Ω,
OUT0 to OUT15(5)		 ±2 ±6 %/V
T(TEF) Thermal error flag threshold Junction temperature(1) 150 170 °C
V(LED) LED open detection threshold 0.3 0.4 V
V(IREF) Reference voltage output RI(REF) = 640 Ω 1.20 1.25 1.29 V
(1) Not tested. Specified by design.
(2) The deviation of each output from the average of OUT0-15 constant current. It is calculated by Equation 1 in Test Parameter Equations.
(3) The deviation of average of OUT0–OUT15 constant current from the ideal constant-current value. It is calculated by Equation 2 in Test Parameter Equations. The ideal current is calculated by Equation 3 in Test Parameter Equations.
(4) The line regulation is calculated by Equation 4 in Test Parameter Equations.
(5) The load regulation is calculated by Equation 5 in Test Parameter Equations.

6.6 Switching Characteristics

VCC = 3 V to 5.5 V, CL = 15 pF, TJ = –40°C to 125°C (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
tr0 Rise time SOUT 16 ns
tr1 Rise time OUTn, VCC = 5 V, TA = 60°C, DCn = 3Fh 10 30 ns
tf0 Fall time SOUT 16 ns
tf1 Fall time OUTn, VCC = 5 V, TA = 60°C, DCn = 3Fh 10 30 ns
tpd0 Propagation delay time SCLK to SOUT (see Figure 12) 30 ns
tpd1 Propagation delay time BLANK to OUT0 (see Figure 12) 60 ns
tpd2 Propagation delay time OUTn to XERR (see Figure 12) 1000 ns
tpd3 Propagation delay time GSCLK to OUT0 (see Figure 12) 60 ns
tpd4 Propagation delay time XLAT to IOUT  (dot correction) (see Figure 12) 1000 ns
td Output delay time OUTn to OUT(n+1) (see Figure 12) 20 30 ns
ton_err Output on-time error touton – tgsclk (see Figure 12), GSn = 01h, GSCLK = 11 MHz 10 –50 –90 ns

6.7 Typical Characteristics

rref_v_io_lds165.gif
Figure 1. Reference Resistor vs Output Current
io_vo_lds165.gif
Figure 3. Output Current vs Output Voltage
iolc_ta_lds165.gif
Figure 5. Delta Output Current vs Free-Air Temperature
io_dcd_lds165.gif
Figure 7. Dot Correction Linearity (ABS Value)
io_dcd4_lds165.gif
Figure 9. Dot Correction Linearity (ABS Value)
tc_pwr_temp_pwp_lds165.gif
Figure 2. Power Dissipation Rate vs Free-Air Temperature
io2_vo_lds165.gif
Figure 4. Output Current vs Output Voltage
iolc_io_lds165.gif
Figure 6. Delta Output Current vs Output Current
io_dcd2_lds165.gif
Figure 8. Dot Correction Linearity (ABS Value)