SBVS127E March   2009  – July 2017 TLC5951

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Description (Continued)
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Switching Characteristics
    7. 7.7 Typical Characteristics
  8. 8 Parameter Measurement Information
    1. 8.1 Pin Equivalent Input and Output Schematic Diagrams
    2. 8.2 Test Circuits
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Thermal-Shutdown and Thermal-Error Flags
      2. 9.3.2 Noise Reduction
    4. 9.4 Device Functional Modes
      1. 9.4.1 Maximum Constant Sink-Current Value
      2. 9.4.2 Dot Correction (DC) Function
      3. 9.4.3 Global Brightness Control (BC) Function
      4. 9.4.4 Grayscale (GS) Function (PWM Control)
        1. 9.4.4.1 PWM Counter 12-Bit Mode Without Auto Repeat
        2. 9.4.4.2 PWM Counter 8-, 10-, or 12-Bit Mode Without Auto Repeat
        3. 9.4.4.3 PWM Counter 8-, 10-, or 12-Bit Mode With Auto Repeat
      5. 9.4.5 Register and Data Latch Configuration
        1. 9.4.5.1 288-Bit Common Shift Register
        2. 9.4.5.2 Grayscale Data Latch
        3. 9.4.5.3 DC, BC, FC, and UD Shift Register
          1. 9.4.5.3.1 DC, BC, FC, and UD Data Latch
          2. 9.4.5.3.2 Dot-Correction Data Latch
          3. 9.4.5.3.3 Global-Brightness Control-Data Latch
          4. 9.4.5.3.4 Function-Control Data Latch
          5. 9.4.5.3.5 User-Defined Data Latch
      6. 9.4.6 Status Information Data (SID)
      7. 9.4.7 Continuous Base LOD, LSD, and TEF
  10. 10Device and Documentation Support
    1. 10.1 Receiving Notification of Documentation Updates
    2. 10.2 Community Resources
    3. 10.3 Trademarks
    4. 10.4 Electrostatic Discharge Caution
    5. 10.5 Glossary
  11. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8 Parameter Measurement Information

8.1 Pin Equivalent Input and Output Schematic Diagrams

TLC5951 pmi_gssclk-gsclkb_bvs127.gif Figure 34. GSSCK, GSLAT, DCSIN, DCSCK, GSCKR, GSCKG, GSCKB
TLC5951 pmi_gssout-dcsout_bvs127.gif Figure 36. GSSOUT, DCSOUT
TLC5951 pmi_gssin-xblnk_bvs127.gif Figure 35. GSSIN, XBLNK
TLC5951 pmi_outrgb0-7_bvs127.gif Figure 37. OUTR0, -G0, -B0 Through OUTR7, -G7, -B7

8.2 Test Circuits

TLC5951 tac_rise_fall_outn_bvs127.gif
1. CL includes measurement probe and jig capacitance.
2. X = R, G, or B; n = 0–7.
Figure 38. Rise-Time and Fall-Time Test Circuit for OUTRn, -Gn, -Bn
TLC5951 tac_rise_fall_gs-dcsout_bvs127.gif
1. CL includes measurement probe and jig capacitance.
Figure 39. Rise-Time and Fall-Time Test Circuit for GSSOUT and DCSOUT
TLC5951 tac_test_outn_bvs127.gif
1. X = R, G, or B; n = 0–7.
Figure 40. Constant-Current Test Circuit for OUTRn, -Gn, -Bn