SBVS146D August   2010  – December 2015 TLC5971

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Dissipation Ratings
    8. 6.8 Typical Characteristics
  7. Parametric Measurement Information
    1. 7.1 Test Circuits
    2. 7.2 Pin Equivalent Input and Output Schematics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Auto Display Repeat Function
      2. 8.3.2 Display Timing Reset Function
      3. 8.3.3 Output Timing Select Function
      4. 8.3.4 Thermal Shutdown
      5. 8.3.5 Noise Reduction
    4. 8.4 Device Functional Modes
      1. 8.4.1 Maximum Constant Sink Current Setting
    5. 8.5 Programming
      1. 8.5.1 Global Brightness Control (BC) Function (Sink Current Control)
      2. 8.5.2 Grayscale (GS) Function (PWM Control)
      3. 8.5.3 Enhanced Spectrum (ES) PWM Control
      4. 8.5.4 Register and Data Latch Configuration
        1. 8.5.4.1 224-Bit Shift Register
        2. 8.5.4.2 218-Bit Data Latch
      5. 8.5.5 Internal Latch Pulse Generation Timing
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Define Basic Parameters
        2. 9.2.2.2 Data Input Sequence
        3. 9.2.2.3 How to Control the TLC5971
          1. 9.2.2.3.1 Data Write and PWM Control with Internal Grayscale Clock Mode
          2. 9.2.2.3.2 Data Write and PWM Control with External Grayscale Clock Mode
      3. 9.2.3 Application Curve
    3. 9.3 System Examples
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Community Resources
    2. 12.2 Trademarks
    3. 12.3 Electrostatic Discharge Caution
    4. 12.4 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

11 Layout

11.1 Layout Guidelines

  1. Place the decoupling capacitor near the VCC pin and GND plane.
  2. Route the GND pattern as widely as possible for large GND currents.
  3. Connecting wire between the chained ICs should be as short as possible to reduce wire inductance.

11.2 Layout Example

TLC5971 layout_example.gif Figure 40. Layout Example