SLVSEB3A June 2018 – January 2019 TLC6946 , TLC6948
PRODUCTION DATA.
The TLC6946 device integrates 16K bits of SRAM to support 1- to 32-multiplexing and the TLC6948 device integrates 24K bits of SRAM to support 1- to 48-multiplexing. SRAM is divided into two BANKs: BANK A and BANK B. While BANK A is displaying, BANK B is ready to receive the data of the next frame. While BANK B is displaying, BANK A is ready to receive the data of next frame.