SLVSEJ1A February   2021  – May 2022 TLC6983

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Description (continued)
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements
    7. 7.7 Switching Characteristics
    8. 7.8 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Independent and Stackable Mode
        1. 8.3.1.1 Independent Mode
        2. 8.3.1.2 Stackable Mode
      2. 8.3.2 Current Setting
        1. 8.3.2.1 Brightness Control (BC) Function
        2. 8.3.2.2 Color Brightness Control (CC) Function
        3. 8.3.2.3 Choosing BC and CC for a Different Application
      3. 8.3.3 Frequency Multiplier
      4. 8.3.4 Line Transitioning Sequence
      5. 8.3.5 Protections and Diagnostics
        1. 8.3.5.1 Thermal Shutdown Protection
        2. 8.3.5.2 IREF Resistor Short Protection
        3. 8.3.5.3 LED Open Load Detection and Removal
          1. 8.3.5.3.1 LED Open Detection
          2. 8.3.5.3.2 Read LED Open Information
          3. 8.3.5.3.3 LED Open Caterpillar Removal
        4. 8.3.5.4 LED Short/Weak Short Circuitry Detection and Removal
          1. 8.3.5.4.1 LED Short/Weak Short Detection
          2. 8.3.5.4.2 Read LED Short Information
          3. 8.3.5.4.3 LSD Caterpillar Removal
    4. 8.4 Device Functional Modes
    5. 8.5 Continuous Clock Series Interface
      1. 8.5.1 Data Validity
      2. 8.5.2 CCSI Frame Format
      3. 8.5.3 Write Command
        1. 8.5.3.1 Chip Index Write Command
        2. 8.5.3.2 VSYNC Write Command
        3. 8.5.3.3 Soft_Reset Command
        4. 8.5.3.4 Data Write Command
      4. 8.5.4 Read Command
    6. 8.6 PWM Grayscale Control
      1. 8.6.1 Grayscale Data Storage and Display
        1. 8.6.1.1 Memory Structure Overview
        2. 8.6.1.2 Details of Memory Bank
        3. 8.6.1.3 Write a Frame Data into Memory Bank
      2. 8.6.2 PWM Control for Display
    7. 8.7 Register Maps
      1. 8.7.1  FC0
      2. 8.7.2  FC1
      3. 8.7.3  FC2
      4. 8.7.4  FC3
      5. 8.7.5  FC4
      6. 8.7.6  FC10
      7. 8.7.7  FC11
      8. 8.7.8  FC12
      9. 8.7.9  FC13
      10. 8.7.10 FC14
      11. 8.7.11 FC15
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
        1. 9.2.1.1 System Structure
        2. 9.2.1.2 SCLK Frequency
        3. 9.2.1.3 Internal GCLK Frequency
        4. 9.2.1.4 Line Switch Time
        5. 9.2.1.5 Blank Time Removal
        6. 9.2.1.6 BC and CC
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Chip Index Command
        2. 9.2.2.2 FC Registers Settings
        3. 9.2.2.3 Grayscale Data Write
        4. 9.2.2.4 VSYNC Command
        5. 9.2.2.5 LED Open and Short Read
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Support Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.3.1.2 Stackable Mode

While operating the TLC6983 in stackable mode, as shown in Figure 8-2 and Figure 8-3, Device2 must be rotated 180o relative to Device1. This action allows the position of line switches to be near the center column of the LED matrix for better routing. For Device1c, the lines are connected sequentially (line switch 0 connected to scan line 1). However on Device 2, the lines are connected in reverse order, with the 16th scan line is connected to line switch 15 and the 32th scan line is connected to line switch 0.

Figure 8-2 shows the connection between two TLC6983 devices in stackable mode driving a 32 × 32 RGB LED pixels. The MOD_SIZE must be configured to 00b/10b. Device1 supplies 16 line switches for the first 16 scan line, and Device2 supplies 16 line switches for scan line 17-32. The data for matrix sections A and C are stored in Deivce1, while matrix sections B and D data are stored in Device2.

GUID-4C0E41B4-C18F-435D-9E84-CF85B1E08359-low.gif Figure 8-2 Two Devices in Stackable Mode

Figure 8-3 shows the connection between three devices connected in stackable mode with MOD_SIZE bits set to 11b. In this configuration, Device1 supplies the line switches for the first 16 scan lines, Device2 supplies line switches for scan lines 17-32, and the line switches of Device3 are not used. Matrix A and D's data are stored in Device 1, matrix B and E's data are stored in Device2, and matrix C and F's data are stored in Device3.

GUID-055FDF88-1BA1-4768-B31E-880D8CA55303-low.gif Figure 8-3 Three Devices in Stackable Mode

To make sure the scanning sequence is still from 1st line to 32nd line, the scan line switching order of the second device must be reversed. This can be configured by the SCAN_REV (see FC4 for more details).

Table 8-1 shows the pin assignment between the LED matrix physical lines and the TLC6983 corresponding pins, depending on the SCAN_REV.

Table 8-1 Stackable with Different SCAN_REV Value
LED Matrix Physical Line Device Line Switch Pin (SCAN_REV = 1) Device Line Switch Pin (SCAN_REV = 0)
L0 1_LS0 1_LS0
L1 1_LS1 1_LS1
L2 1_LS2 1_LS2
L3 1_LS3 1_LS3
L4 1_LS4 1_LS4
L5 1_LS5 1_LS5
L6 1_LS6 1_LS6
L7 1_LS7 1_LS7
L8 1_LS8 1_LS8
L9 1_LS9 1_LS9
L10 1_LS10 1_LS10
L11 1_LS11 1_LS11
L12 1_LS12 1_LS12
L13 1_LS13 1_LS13
L14 1_LS14 1_LS14
L15 1_LS15 1_LS15
L16 2_LS15 2_LS0
L17 2_LS14 2_LS1
L18 2_LS13 2_LS2
L19 2_LS12 2_LS3
L20 2_LS11 2_LS4
L21 2_LS10 2_LS5
L22 2_LS9 2_LS6
L23 2_LS8 2_LS7
L24 2_LS7 2_LS8
L25 2_LS6 2_LS9
L26 2_LS5 2_LS10
L27 2_LS4 2_LS11
L28 2_LS3 2_LS12
L29 2_LS2 2_LS13
L30 2_LS1 2_LS14
L31 2_LS0 2_LS15

When the TLC6983 devices are used in stackable mode, if there are unused line switches, these unused line switches must be the last line switches of the first or the second device. For example, if there are only 30 scanning lines, and if,

The unused line switches must be 2_LS14, 2_LS15 if SCAN_REV = '0'b, or 2_LS1, 2_LS0 if SCAN_REV = '1'b.