SLIS187C
June 2021 – March 2022
TLC6A598
PRODUCTION DATA
1
Features
2
Applications
3
Description
4
Revision History
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
Timing Requirements
6.7
Timing Waveforms
6.8
Typical Characteristics
7
Parameter Measurement Information
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
Serial-In Interface
8.3.2
Clear Registers
8.3.3
Output Channels
8.3.4
Register Clock
8.3.5
Cascade Through SER OUT
8.3.6
Output Control
8.3.7
Clamping Structure
8.3.8
Protection Functions
8.3.8.1
Overcurrent Protection
8.3.8.2
Output Detection
8.3.8.3
Serial Communication Error
8.3.8.4
Thermal Shutdown
8.3.9
Interface
8.3.9.1
Register Write
8.3.9.2
Register Read
8.3.9.3
Shift-Register Communication-Fault Detection
8.4
Device Functional Modes
8.4.1
Operation With VCC < 3 V
8.4.2
Operation With 5.5 V ≤ VCC ≤ 7 V
8.5
Register Maps
8.5.1
Configuration Register(Offset=0h)[reset=0h]
8.5.2
Fault Readback Register(Offset=1h)[reset=0h]
9
Application and Implementation
9.1
Application Information
9.2
Typical Application 1
9.2.1
Design Requirements
9.2.2
Detailed Design Procedure
9.2.3
Application Curves
9.3
Typical Application 2
9.3.1
Design Requirements
9.3.2
Detailed Design Procedure
9.4
Typical Application 3
9.4.1
Design Requirements
9.4.2
Detailed Design Procedure
10
Power Supply Recommendations
11
Layout
11.1
Layout Guidelines
11.2
Layout Example
12
Device and Documentation Support
12.1
Receiving Notification of Documentation Updates
12.2
Support Resources
12.3
Trademarks
12.4
Electrostatic Discharge Caution
12.5
Glossary
13
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
DW|24
MPDS174A
Thermal pad, mechanical data (Package|Pins)
Orderable Information
slis187c_oa
slis187c_pm
11.2
Layout Example
Figure 11-1
TLC6A598 Example Layout