SLVSEB5A July   2018  – August 2018 TLC6C5716-Q1

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Typical Application Schematic
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Switching Characteristics
    8. 6.8 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Maximum Constant-Sink-Current Setting
      2. 7.3.2 Brightness Control and Dot Correction
      3. 7.3.3 Grayscale Configuration
        1. 7.3.3.1 PWM Auto Repeat
        2. 7.3.3.2 PWM Timing Reset
      4. 7.3.4 Diagnostics
        1. 7.3.4.1  LED Diagnostics
        2. 7.3.4.2  Adjacent-Pin-Short Check
        3. 7.3.4.3  IREF-Short and IREF-Open Detection
        4. 7.3.4.4  Pre-Thermal Warning Flag
        5. 7.3.4.5  Thermal Error Flag
        6. 7.3.4.6  Negate-Bit Toggle
        7. 7.3.4.7  LOD_LSD Self-Test
        8. 7.3.4.8  ERR Pin
        9. 7.3.4.9  ERROR Clear
        10. 7.3.4.10 Global Reset
        11. 7.3.4.11 Slew Rate Control
        12. 7.3.4.12 Channel Group Delay
    4. 7.4 Device Functional Modes
      1. 7.4.1 Power Up
      2. 7.4.2 Device Initialization
      3. 7.4.3 Fault Mode
      4. 7.4.4 Normal Operation
    5. 7.5 Programming
      1. 7.5.1 Register Write and Read
        1. 7.5.1.1 FC-BC-DC Write
          1. 7.5.1.1.1 FC Data Write
          2. 7.5.1.1.2 BC Data Write
          3. 7.5.1.1.3 DC Data Write
        2. 7.5.1.2 Grayscale Data Write
        3. 7.5.1.3 Special Command Function
          1. 7.5.1.3.1 GS Read
          2. 7.5.1.3.2 FC-BC-DC Read
          3. 7.5.1.3.3 Status Information Data Read
    6. 7.6 Register Maps
      1. 7.6.1 GRAYSCALE Registers
        1. 7.6.1.1 OUTn_GS Register (Offset = 0h)
          1. Table 25. OUTn_GS Register Field Descriptions
      2. 7.6.2 FC-BC-DC Registers
        1. 7.6.2.1 FC-BC-DC Register (Offset = 1h)
          1. Table 28. FC-BC-DC Register Field Descriptions
      3. 7.6.3 SID Registers
        1. 7.6.3.1 SID Register (Offset = 2h)
          1. Table 31. SID Register Field Descriptions
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Receiving Notification of Documentation Updates
    2. 11.2 Community Resources
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information
    1. 12.1 Package Option Addendum
      1. 12.1.1 Packaging Information
      2. 12.1.2 Tape and Reel Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)

7.5.1.1.1 FC Data Write

The FC data is 13 bits in length, located from bit 204 to bit 192. See Table 12 for the detailed description. The default value for all FC data is 0, except for the LED_ERR_MASK bit which is 1.

Table 12. Function-Control Data-Bit Assignment

BIT NAME DESCRIPTION
204 LED_ERR_MASK LOD-LSD failure or PWM error information mask bit
0b = Any LOD-LSD failure or PWM error pulls down the ERR pin
1b = LOD-LSD failure or PWM error is masked from affecting the ERR pin
203 SLEW_RATE Turnon and turnoff speed configuration bit
0b = 200-ns rise and fall times.
1b = 100-ns rise and fall times.
202 LOD_VOLATGE LED open-detection (LOD) threshold
0b = LOD threshold is 0.3 V
1b = LOD threshold is 0.5 V
201 LSD_VOLTAGE LED short-detection (LSD) threshold
0b = LSD threshold is VSENSE – 0.3 V
1b = LSD threshold is VSENSE – 0.7 V
200 APS_CURRENT Adjacent-pin short-detection sink current
0b = 20-µA APS current
1b = 40-µA APS current
199 APS_TIME Adjacent-pin short-detection time
0b = 10-µs APS detection time
1b = 20-µs APS detection time
198–197 GS_MODE Grayscale-counter mode selection.
00 or 01b = 12-bit mode
10b = 10-bit mode
11b = 8-bit mode
196 TIMING_RESET Display-timing reset mode
0b = Disabled
1b = Enabled
195 AUTO_REPEAT Auto-display repeat mode
0b = Disabled
1b = Enabled
194 DC_RANGE_B Dot-correction adjustment range for the BLUE color output
0b = Low range, 0%–66.7%
1b = High range, 33.3%–100%
193 Reserved Reserved
192 DC_RANGE_R Dot–correction adjustment range for the RED color output
0b = Low range, 0%–66.7%
1b = High range, 33.3%–100%

The grayscale counter has 12-bit, 10-bit, and 8-bit configurations. Bits 198–197 in the FC register configure the grayscale counter mode.

Table 13. GS Counter Mode Table

GRAYSCALE COUNTER MODE (GS_MODE) FUNCTION MODE
Bit 198 Bit 197
0 Don't care 12-bit counter mode
1 0 10-bit counter mode, the lowest 10 bits of the 12-bit GS data are valid
1 1 8-bit counter mode, the lowest 8 bits of the 12-bit GS data are valid