SLASEK2A December   2017  – August 2018 TLC6C5724-Q1

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Typical Application Schematic
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Switching Characteristics
    8. 6.8 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Maximum Constant-Sink-Current Setting
      2. 7.3.2 Brightness Control and Dot Correction
      3. 7.3.3 Grayscale Configuration
        1. 7.3.3.1 PWM Auto Repeat
        2. 7.3.3.2 PWM Timing Reset
      4. 7.3.4 Diagnostics
        1. 7.3.4.1  LED Diagnostics
        2. 7.3.4.2  Adjacent-Pin-Short Check
        3. 7.3.4.3  IREF Short and IREF Open Detection
        4. 7.3.4.4  Pre-Thermal Warning Flag
        5. 7.3.4.5  Thermal Error Flag
        6. 7.3.4.6  Negate Bit Toggle
        7. 7.3.4.7  LOD_LSD Self-Test
        8. 7.3.4.8  ERR Pin
        9. 7.3.4.9  ERROR Clear
        10. 7.3.4.10 Global Reset
        11. 7.3.4.11 Slew Rate Control
        12. 7.3.4.12 Channel Group Delay
    4. 7.4 Device Functional Modes
      1. 7.4.1 Power Up
      2. 7.4.2 Device Initialization
      3. 7.4.3 Fault Mode
      4. 7.4.4 Normal Operation
    5. 7.5 Programming
      1. 7.5.1 Register Write and Read
        1. 7.5.1.1 FC-BC-DC Write
          1. 7.5.1.1.1 FC Data Write
          2. 7.5.1.1.2 BC Data Write
          3. 7.5.1.1.3 DC Data Write
        2. 7.5.1.2 Grayscale Data Write
        3. 7.5.1.3 Special Command Function
          1. 7.5.1.3.1 GS Read
          2. 7.5.1.3.2 FC-BC-DC Read
          3. 7.5.1.3.3 Status Information Data Read
    6. 7.6 Register Maps
      1. 7.6.1 GRAYSCALE Registers
        1. 7.6.1.1 OUTn_GS Register (Offset = 0h)
          1. Table 25. OUTn_GS Register Field Descriptions
      2. 7.6.2 FC-BC-DC Registers
        1. 7.6.2.1 FC-BC-DC Register (Offset = 1h)
          1. Table 28. FC-BC-DC Register Field Descriptions
      3. 7.6.3 SID Registers
        1. 7.6.3.1 SID Register (Offset = 2h)
          1. Table 31. SID Register Field Descriptions
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Receiving Notification of Documentation Updates
    2. 11.2 Community Resources
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information
    1. 12.1 Package Option Addendum
      1. 12.1.1 Packaging Information
      2. 12.1.2 Tape and Reel Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)

7.5.1.1.3 DC Data Write

The DC data is 168 bits in length, located from bit 167 to bit 0. The TLC6C5724-Q1 device can adjust the output current of each channel using the DC function. The DC function has two adjustment ranges with 7-bit resolution. Table 15 shows the DC data assignments in the DC registers. The high adjustment range DC can adjust output current from 33.3% to 100% of I(OUT)max. The low adjustment range DC can adjust output current from 0% to 66.7% of I(OUT)max. The range control is in bits 194–192 in the function control data latch select the high or low adjustment. Bit 194 controls the OUTB DC range. Bit 193 controls the OUTG DC range, Bit 192 controls the OUTR DC range. For details, see Table 12

Table 15. DC Data Assignments

BITS DATA BITS DATA
167–161 OUTB7 83–77 OUTB3
160–154 OUTG7 76–70 OUTG3
153–147 OUTR7 69–63 OUTR3
146–140 OUTB6 62–56 OUTB2
139–133 OUTG6 55–49 OUTG2
132–126 OUTR6 48–42 OUTR2
125–119 OUTB5 41–35 OUTB1
118–112 OUTG5 34–28 OUTG1
111–105 OUTR5 27–21 OUTR1
104–98 OUTB4 20–14 OUTB0
97–91 OUTG4 13–7 OUTG0
90–84 OUTR4 6–0 OUTR0

Table 16. Output Current vs High DC Range

DC DATA (BINARY) DC DATA (DECIMAL) DC DATA (HEX) BC DATA (HEX) CURRENT RATIO (%) CURRENT (I(OUT)max = 40 mA) CURRENT (I(OUT)max = 2 mA )
000 0000 0 00 FF 33.3 13.33 0.67
000 0001 1 01 FF 33.9 13.54 0.68
000 0010 2 02 FF 34.4 13.75 0.69
... ... ... ... ... ... ...
111 1101 125 7D FF 99 39.58 1.98
111 1110 126 7E FF 99.5 39.79 1.99
111 1111 127 7F FF 100 40 2

Table 17. Output Current vs Low DC Range

DC DATA (BINARY) DC DATA (DECIMAL) DC DATA (HEX) BC DATA (HEX) CURRENT RATIO (%) CURRENT (I(OUT)max = 40 mA) CURRENT (I(OUT)max = 2 mA )
000 0000 0 00 FF 0 0. 0
000 0001 1 01 FF 0.5 0.21 0.01
000 0010 2 02 FF 1.0 0.42 0.02
... ... ... ... ... ... ...
111 1101 125 7D FF 65.6 26.25 1.31
111 1110 126 7E FF 66.1 26.46 1.32
111 1111 127 7F FF 66.7 26.67 1.33

Table 18. Output Current vs BC (High DC Range)

DC DATA (BINARY) BC DATA (DECIMAL) BC DATA (HEX) DC DATA (HEX) CURRENT RATIO (%) CURRENT (I(OUT)max = 40 mA) CURRENT (I(OUT)max = 2 mA )
0000 0000 0 00 7F 0 0 0.00
0000 0001 1 01 7F 0.4 0.16 0.01
0000 0010 2 02 7F 0.8 0.32 0.02
... ... ... ... ... ... ...
1111 1101 253 FD 7F 99.2 39.69 1.98
1111 1110 254 FE 7F 99.6 39.84 1.99
1111 1111 255 FF 7F 100 40 2