SLIS180 May   2016 TLC6C5912

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Thermal Shutdown
      2. 8.3.2 Serial-In Interface
      3. 8.3.3 Clear Register
      4. 8.3.4 Cascade Through SER OUT
      5. 8.3.5 Output Control
    4. 8.4 Device Functional Modes
      1. 8.4.1 Operation With VCC < 3 V
      2. 8.4.2 Operation With 5.5 V ≤ VCC ≤ 8 V
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curve
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Community Resources
    2. 12.2 Trademarks
    3. 12.3 Electrostatic Discharge Caution
    4. 12.4 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

9 Application and Implementation

NOTE

Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.

9.1 Application Information

The TLC6C5912 device is a serial-in, parallel-out, power logic 8-bit shift register with low-side open-drain DMOS output rating of 40 V and 50-mA continuous sink-current capabilities when VCC= 5 V. The device is designed to drive resistive loads and is particularly well-suited as an interface between a microcontroller and LEDs or lamps. The device also provides up to 2000 V of ESD protection when tested using the human body model and 200 V when using the machine model.

9.2 Typical Application

Figure 13 shows a typical cascade application circuit with two TLC6C5912 chips configured to cascade topology. The MCU generates all the input signals.

TLC6C5912 Typ_App_Circuit_SLIS141.gif Figure 13. Typical Application Circuit

9.2.1 Design Requirements

Table 1 lists the parameters for this design example.

Table 1. Design Parameters

DESIGN PARAMETER EXAMPLE VALUE
Vbattery 9 V to 40 V
VCC _ 1 3.3 V
I(D0), I(D1), I(D2), I(D3) , I(D4), I(D5), I(D6), I(D7), I(D8), I(D9), I(D10), I(D11) 30 mA
VCC _ 2 5 V
I(D12), I(D13), I(D14), I(D15) , I(D16), I(D17), I(D18), I(D19), I(D20), I(D21), I(D122), I(D23) 50 mA

9.2.2 Detailed Design Procedure

To begin the design process, the designer must decide on a few parameters:

  • Vsupply: LED supply voltage
  • VDx: LED forward voltage
  • I: LED current

After determining the parameters, calculate the resistor in series with LED using Equation 1.

Equation 1. Rx = (Vsupply – VDx) / I

9.2.3 Application Curve

TLC6C5912 waveform_slis141.gif Figure 14. TLC6C5912 Application Waveform