SLLSEZ8D December 2017 – June 2022 TLIN1022-Q1
PRODUCTION DATA
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
---|---|---|---|---|---|---|
Power Supply | ||||||
VSUP | Operational supply voltage (ISO/DIS 17987 Param 10) | Device is operational beyond the LIN defined nominal supply voltage range See Figure 7-1 and Figure 7-2 | 4 | 36 | V | |
VSUP | Nominal supply voltage (ISO/DIS 17987 Param 10): Normal Mode: Ramp VSUP while LIN signal is a 10 kHZ Square Wave with 50 % duty cycle and 18V swing. | Normal and Standby Modes: Ramp VSUP while LIN signal is a 10 kHZ Square Wave with 50 % duty cycle and 36V swing. See Figure 7-1 and Figure 7-2 | 4 | 36 | V | |
Sleep Mode | 4 | 36 | V | |||
UVSUP | Under voltage VSUP threshold | 2.9 | 3.85 | V | ||
UVHYS | Delta hysteresis voltage for VSUP under voltage threshold | 0.2 | V | |||
ISUP | Supply Current | Normal Mode: EN = High, bus dominant: total bus load where RLIN > 500 Ω and CLIN < 10 nF See Figure 7-7 | 1.2 | 7.5 | mA | |
ISUP | Supply Current | Standby Mode: EN = Low, bus dominant: total bus load where RLIN > 500 Ω and CLIN < 10 nF See Figure 7-7 | 1.1 | 3.75 | mA | |
ISUP | Supply Current | Normal Mode: EN = High, Bus Recessive: LIN = VSUP, | 670 | 1300 | µA | |
ISUP | Supply Current | Standby Mode: EN = Low, Bus Recessive: LIN = VSUP, | 20 | 40 | µA | |
ISUP | Supply Current | Sleep Mode: 4.0 V < VSUP < 14 V, LIN = VSUP, EN = 0 V, TXD and RXD Floating | 10 | 20 | µA | |
ISUP | Supply Current | Sleep Mode: 14 V < VSUP < 36 V, LIN = VSUP, EN = 0 V, TXD and RXD Floating | 30 | µA | ||
RXD OUTPUT PIN (OPEN DRAIN) | ||||||
VOL | Output Low voltage | Based upon External pull up to VCC | 0.6 | V | ||
IOL | Low level output current, open drain | LIN = 0 V, RXD = 0.4 V | 1.5 | mA | ||
IILG | Leakage current, high-level | LIN = VSUP, RXD = 5 V | –5 | 0 | 5 | µA |
TXD INPUT PIN | ||||||
VIL | Low level input voltage | –0.3 | 0.8 | V | ||
VIH | High level input voltage | 2 | 5.5 | V | ||
VHYS | Input threshold voltage, normal modes& selective wake modes | 50 | 500 | mV | ||
IILG | Low level input leakage current | TXD = Low | –5 | 0 | 5 | µA |
RTXD | Internal pulldown resistor value | 125 | 350 | 800 | kΩ | |
EN INPUT PIN | ||||||
VIL | Low level input voltage | –0.3 | 0.8 | V | ||
VIH | High level input voltage | 2 | 5.5 | V | ||
VHYS | Hysteresis voltage | By design and characterization | 50 | 500 | mV | |
IILG | Low level input current | EN = Low | –5 | 0 | 5 | µA |
REN | Internal Pulldown resistor | 125 | 350 | 800 | kΩ | |
LIN PIN | ||||||
VOH | High level output voltage | LIN recessive, TXD = high, IO = 0 mA, VSUP = 7 V to 36 V | 0.85 | VSUP | ||
LIN recessive, TXD = high, IO = 0 mA, VSUP = 4 V ≤ VSUP < 7 V | 3.0 | V | ||||
VOL | Low level output voltage | LIN dominant, TXD = low, VSUP = 7 V to 36 V | 0.2 | VSUP | ||
LIN dominant, TXD = low, VSUP = 4 V ≤ VSUP < 7 V | 1.2 | V | ||||
VSUP_NON_OP | VSUP where Impact of recessive LIN Bus < 5% (ISO/DIS 17987 Param 11) | TXD & RXD open LIN = 4 V to 45 V | –0.3 | 45 | V | |
IBUS_LIM | Limiting current (ISO/DIS 17987 Param 12) | TXD = 0 V, VLIN = 36 V, RMEAS = 440 Ω, VSUP = 36 V, VBUSdom < 4.518 V See Figure 7-6 | 40 | 90 | 200 | mA |
IBUS_PAS_dom | Receiver leakage current, dominant (ISO/DIS 17987 Param 13) | LIN = 0 V, VSUP = 12 V Driver off/recessive See Figure 7-7 | –1 | mA | ||
IBUS_PAS_rec1 | Receiver leakage current, recessive (ISO/DIS 17987 Param 14) | LIN > VSUP, 8 V < VSUP < 36 V Driver off; See Figure 7-8 | 20 | µA | ||
IBUS_PAS_rec2 | Receiver leakage current, recessive (ISO/DIS 17987 Param 14) | LIN = VSUP, Driver off; See Figure 7-8 | –5 | 5 | µA | |
IBUS_NO_GND | Leakage current, loss of ground (ISO/DIS 17987 Param 15) | GND = VSUP, 0 V ≤ VLIN ≤ 18 V, VSUP = 12 V; See Figure 7-9 | –1 | 1 | mA | |
IBUS_NO_BAT | Leakage current, loss of supply (ISO/DIS 17987 Param 16) | 0 V ≤ VLIN ≤ 36 V, VSUP = GND; See Figure 7-10 | 5 | µA | ||
VBUSdom | Low level input voltage (ISO/DIS 17987 Param 17) | LIN dominant (including LIN dominant for wake up) See Figure 7-3 and Figure 7-4 | 0.4 | VSUP | ||
VBUSrec | High level input voltage (ISO/DIS 17987 Param 18) | Lin recessive See Figure 7-3 and Figure 7-4 | 0.6 | VSUP | ||
VBUS_CNT | Receiver center threshold (ISO/DIS 17987 Param 19) | VBUS_CNT = (VI_DOM + VI_REC)/2 See Figure 7-3 and Figure 7-4 | 0.475 | 0.5 | 0.525 | VSUP |
VHYS | Hysteresis voltage (ISO/DIS 17987 Param 20) | VHYS = (VI_REC - VI_DOM) See Figure 7-3 and Figure 7-4 | 0.175 | VSUP | ||
VSERIAL_DIODE | Serial diode LIN term pullup path (ISO/DIS 17987 Param 21) | By design and characterization | 0.4 | 0.7 | 1 | V |
RRESPONDER | Pullup resistor to VSUP (ISO/DIS 17987 Param 26) | Normal and Standby modes | 20 | 45 | 60 | kΩ |
IRSLEEP | Pullup current source to VSUP | Sleep mode, VSUP = 14 V, LIN = GND | –20 | –2 | µA | |
CLINPIN | Capacitance of LIN pin | VSUP = 14 V | 25 | pF |