SLLSFF6 September   2021 TLIN1024A-Q1

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Description (Continued)
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 ESD Ratings - IEC
    4. 7.4 Thermal Information
    5. 7.5 Recommended Operating Conditions
    6. 7.6 Electrical Characteristics
    7. 7.7 Duty Cycle Characteristics
    8. 7.8 Switching Characteristics
    9. 7.9 Typical Characteristics
  8. 8 Parameter Measurement Information
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1  LIN (Local Interconnect Network) Bus
        1. 9.3.1.1 LIN Transmitter Characteristics
        2. 9.3.1.2 LIN Receiver Characteristics
          1. 9.3.1.2.1 Termination
      2. 9.3.2  TXD (Transmit Input and Output)
      3. 9.3.3  RXD (Receive Output)
      4. 9.3.4  VSUP1/2 (Supply Voltage)
      5. 9.3.5  GND1/2 (Ground)
      6. 9.3.6  EN (Enable Input)
      7. 9.3.7  Protection Features
      8. 9.3.8  TXD Dominant Time Out (DTO)
      9. 9.3.9  Bus Stuck Dominant System Fault: False Wake-Up Lockout
      10. 9.3.10 Thermal Shutdown
      11. 9.3.11 Under Voltage on VSUP
      12. 9.3.12 Unpowered Device and LIN Bus
    4. 9.4 Device Functional Modes
      1. 9.4.1 Normal Mode
      2. 9.4.2 Sleep Mode
      3. 9.4.3 Standby Mode
      4. 9.4.4 Wake-Up Events
        1. 9.4.4.1 Wake-Up Request (RXD)
        2. 9.4.4.2 Mode Transitions
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
        1. 10.2.1.1 Detailed Design Procedures
        2. 10.2.1.2 Normal Mode Application Note
        3. 10.2.1.3 Standby Mode Application Note
        4. 10.2.1.4 TXD Dominant State Timeout Application Note
      2. 10.2.2 Application Curves
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Documentation Support
      1. 13.1.1 Related Documentation
    2. 13.2 Receiving Notification of Documentation Updates
    3. 13.3 Support Resources
    4. 13.4 Trademarks
    5. 13.5 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

10.2.2 Application Curves

Figure 10-2 and Figure 10-3 show the propagation delay from the TXD pin to the LIN pin for both dominant to recessive and recessive to dominant edges. Waveforms are for 1 channel of the device configured in commander mode with external pull-up resistor (1 kΩ) and 680 pF bus capacitance.

GUID-20210513-CA0I-SM0K-SDZ2-FMCNGP8JDS4Q-low.pngFigure 10-2 Dominant to Recessive Propagation
GUID-20210513-CA0I-9QM5-DRJD-BNRGWGVDCG6Z-low.pngFigure 10-3 Recessive to Dominant Propagation