SLLSFF6 September   2021 TLIN1024A-Q1

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Description (Continued)
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 ESD Ratings - IEC
    4. 7.4 Thermal Information
    5. 7.5 Recommended Operating Conditions
    6. 7.6 Electrical Characteristics
    7. 7.7 Duty Cycle Characteristics
    8. 7.8 Switching Characteristics
    9. 7.9 Typical Characteristics
  8. 8 Parameter Measurement Information
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1  LIN (Local Interconnect Network) Bus
        1. 9.3.1.1 LIN Transmitter Characteristics
        2. 9.3.1.2 LIN Receiver Characteristics
          1. 9.3.1.2.1 Termination
      2. 9.3.2  TXD (Transmit Input and Output)
      3. 9.3.3  RXD (Receive Output)
      4. 9.3.4  VSUP1/2 (Supply Voltage)
      5. 9.3.5  GND1/2 (Ground)
      6. 9.3.6  EN (Enable Input)
      7. 9.3.7  Protection Features
      8. 9.3.8  TXD Dominant Time Out (DTO)
      9. 9.3.9  Bus Stuck Dominant System Fault: False Wake-Up Lockout
      10. 9.3.10 Thermal Shutdown
      11. 9.3.11 Under Voltage on VSUP
      12. 9.3.12 Unpowered Device and LIN Bus
    4. 9.4 Device Functional Modes
      1. 9.4.1 Normal Mode
      2. 9.4.2 Sleep Mode
      3. 9.4.3 Standby Mode
      4. 9.4.4 Wake-Up Events
        1. 9.4.4.1 Wake-Up Request (RXD)
        2. 9.4.4.2 Mode Transitions
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
        1. 10.2.1.1 Detailed Design Procedures
        2. 10.2.1.2 Normal Mode Application Note
        3. 10.2.1.3 Standby Mode Application Note
        4. 10.2.1.4 TXD Dominant State Timeout Application Note
      2. 10.2.2 Application Curves
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Documentation Support
      1. 13.1.1 Related Documentation
    2. 13.2 Receiving Notification of Documentation Updates
    3. 13.3 Support Resources
    4. 13.4 Trademarks
    5. 13.5 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6 Pin Configuration and Functions

GUID-20210830-SS0I-PPLD-K6C3-1VH0L30VHPP4-low.gif Figure 6-1 RGY Package,24-Pin RGY (VQFN),Top View
Table 6-1 Pin Functions
PIN I/O DESCRIPTION
NAME NO.
RXD1 1 O Channel 1 RXD Output (open-drain) interface reporting state of LIN1 bus voltage
EN1 2 I Channel 1 Enable Input
TXD1 3 I Channel 1 TXD input interface to control state of LIN1 output
RXD2 4 O Channel 2 RXD Output (open-drain) interface reporting state of LIN2 bus voltage
EN2 5 I Channel 2 Enable Input
TXD2 6 I Channel 2 TXD input interface to control state of LIN2 output
RXD3 7 O Channel 3 RXD Output (open-drain) interface reporting state of LIN3 bus voltage
EN3 8 I Channel 3 Enable Input
TXD3 9 I Channel 3 TXD input interface to control state of LIN3 output
RXD4 10 O Channel 4 RXD Output (open-drain) interface reporting state of LIN4 bus voltage
EN4 11 I Channel 4 Enable Input
TXD4 12 I Channel 4 TXD input interface to control state of LIN4 output
GND2 14 GND Ground pin for Channels 3 and 4
LIN4 15 I/O Channel 4 LIN Bus single-wire transmitter and receiver
VSUP2 16 Supply Channels 3 and 4 Supply Voltage (connected to battery in series with external reverse blocking diode)
LIN3 17 I/O Channel 3 LIN Bus single-wire transmitter and receiver
GND1 19 GND Ground pin for Channels 1 and 2
LIN2 20 I/O Channel 2 LIN Bus single-wire transmitter and receiver
VSUP1 21 Supply Channels 1 and 2 Supply Voltage (connected to battery in series with external reverse blocking diode)
LIN1 22 I/O Channel 1 LIN Bus single-wire transmitter and receiver
NC 13, 18, 23, 24 – Not Connected
Thermal Pad – Can be connected to the PCB ground plane to improve thermal coupling