SLLSFE4A May 2022 – December 2022 TLIN1431-Q1
PRODUCTION DATA
Restart mode is a transitional mode. This mode can be entered from any of the other modes depending upon whether fail-safe mode is disabled. In this mode, the LDO is ramping when coming from sleep mode or fail-safe mode where the LDO was turned off, like a TSD event. Once VCC ≥ UVCC for tRSTN_act (~2 ms), the device enters standby mode. While in restart mode, the nRST pin is latched low. Each time restart mode is entered the restart mode counter is incremented.
The SWE timer starts when the device enters restart mode. If the SWE timer times out, the device enters fail-safe mode. If fail-safe mode is disabled, the device enters sleep mode.
Figure 8-38 Restart Mode Pin Control | Figure 8-39 Restart Mode SPI Control |
A watchdog failure, soft reset or nRST event resets tNRST_TOG to default value of typically 2 ms
The typical time between the release of a nRST input pulse for device to enter restart mode is ~ 200 ns