SLVS561M December   2004  – January 2023 TLV1117

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 TLV1117C Electrical Characteristics
    6. 6.6 TLV1117I Electrical Characteristics
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 NPN Output Drive
      2. 7.3.2 Overload Block
      3. 7.3.3 Programmable Feedback
    4. 7.4 Device Functional Modes
      1. 7.4.1 Normal Operation
      2. 7.4.2 Operation With Low Input Voltage
      3. 7.4.3 Operation at Light Loads
      4. 7.4.4 Operation in Self Protection
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curve
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  9. 9 Device and Documentation Support
    1. 9.1 Receiving Notification of Documentation Updates
    2. 9.2 Support Resources
    3. 9.3 Trademarks
    4. 9.4 Electrostatic Discharge Caution
    5. 9.5 Glossary
  10. 10Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • KVU|3
  • DRJ|8
  • DCY|4
  • KCS|3
  • KCT|3
  • KTT|3
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.2 Typical Application

GUID-6355CB04-874B-4CDD-8E7F-3580C747C752-low.gifFigure 8-1 Basic Adjustable Regulator

The adjustable version of the TLV1117 takes a 2.7-V to 15-V input. The voltage VREF refers to the voltage between the output and the ADJUST pin, typically 1.25 V. The VREF voltage causes a current to flow across R1, which is the same current that flows across R2 (minus the negligible 50-µA IADJ). Therefore, R2 can be adjusted to create a larger voltage drop from GND and set the output voltage. The output voltage equation is described in the Section 8.2.2 section.