SBOS858 April   2017 TLV171-Q1

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Description (continued)
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information: TLV171-Q1
    5. 6.5 Thermal Information: TLV2171-Q1
    6. 6.6 Thermal Information: TLV4171-Q1
    7. 6.7 Electrical Characteristics
    8. 6.8 Typical Characteristics
      1. 6.8.1 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Operating Characteristics
      2. 7.3.2 Phase-Reversal Protection
      3. 7.3.3 Capacitive Load and Stability
    4. 7.4 Device Functional Modes
      1. 7.4.1 Common-Mode Voltage Range
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Electrical Overstress
    2. 8.2 Typical Application
      1. 8.2.1 Capacitive Load Drive Solution Using an Isolation Resistor
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curve
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Related Links
    3. 11.3 Community Resource
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5 Pin Configuration and Functions

TLV171-Q1 DBV Package
5-Pin SOT-23
Top View
TLV171-Q1 TLV2171-Q1 TLV4171-Q1 po_sot23-5_bos516.gif

Pin Functions

PIN I/O DESCRIPTION
NAME NO.
+IN 3 I Noninverting input
–IN 4 I Inverting input
OUT 1 O Output
V+ 5 — Positive (highest) power supply
V– 2 — Negative (lowest) power supply
TLV2171-Q1 D or DGK Packages
8-Pin SOIC or VSSOP
Top View
TLV171-Q1 TLV2171-Q1 TLV4171-Q1 po_8_d_sbos556.gif

Pin Functions

PIN I/O DESCRIPTION
NAME NO.
+IN A 3 I Noninverting input, channel A
+IN B 5 I Noninverting input, channel B
–IN A 2 I Inverting input, channel A
–IN B 6 I Inverting input, channel B
OUT A 1 O Output, channel A
OUT B 7 O Output, channel B
V+ 8 — Positive (highest) power supply
V– 4 — Negative (lowest) power supply
TLV4171-Q1 D and PW Packages
14-Pin SOIC and TSSOP
Top View
TLV171-Q1 TLV2171-Q1 TLV4171-Q1 po_so-14_bos516.gif

Pin Functions

PIN I/O DESCRIPTION
NAME NO.
+IN A 3 I Noninverting input, channel A
+IN B 5 I Noninverting input, channel B
+IN C 10 I Noninverting input, channel C
+IN D 12 I Noninverting input, channel D
–IN A 2 I Inverting input, channel A
–IN B 6 I Inverting input, channel B
–IN C 9 I Inverting input, channel C
–IN D 13 I Inverting input, channel D
OUT A 1 O Output, channel A
OUT B 7 O Output, channel B
OUT C 8 O Output, channel C
OUT D 14 O Output, channel D
V+ 4 — Positive (highest) power supply
V– 11 — Negative (lowest) power supply